[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

llvm-svn: 295893

[CodeGen] Move MacroFusion to the target

This patch moves the class for scheduling adjacent instructions,
MacroFusion, to the target.

In AArch64, it also expands the fusion to all instructions pair

[CodeGen] Move MacroFusion to the target

This patch moves the class for scheduling adjacent instructions,
MacroFusion, to the target.

In AArch64, it also expands the fusion to all instructions pairs in a
scheduling block, beyond just among the predecessors of the branch at the
end.

Differential revision: https://reviews.llvm.org/D28489

llvm-svn: 293737

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Cleanup dump() functions.

We had various variants of defining dump() functions in LLVM. Normalize
them (this should just consistently implement the things discussed in
http://lists.llvm.org/pipermai

Cleanup dump() functions.

We had various variants of defining dump() functions in LLVM. Normalize
them (this should just consistently implement the things discussed in
http://lists.llvm.org/pipermail/cfe-dev/2014-January/034323.html

For reference:
- Public headers should just declare the dump() method but not use
LLVM_DUMP_METHOD or #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
- The definition of a dump method should look like this:
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void MyClass::dump() {
// print stuff to dbgs()...
}
#endif

llvm-svn: 293359

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Implement LaneBitmask::any(), use it to replace !none(), NFCI

llvm-svn: 289974

Extract LaneBitmask into a separate type

Specifically avoid implicit conversions from/to integral types to
avoid potential errors when changing the underlying type. For example,
a typical initializa

Extract LaneBitmask into a separate type

Specifically avoid implicit conversions from/to integral types to
avoid potential errors when changing the underlying type. For example,
a typical initialization of a "full" mask was "LaneMask = ~0u", which
would result in a value of 0x00000000FFFFFFFF if the type was extended
to uint64_t.

Differential Revision: https://reviews.llvm.org/D27454

llvm-svn: 289820

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MachineScheduler: Export function to construct "default" scheduler.

This makes the createGenericSchedLive() function that constructs the
default scheduler available for the public API. This should h

MachineScheduler: Export function to construct "default" scheduler.

This makes the createGenericSchedLive() function that constructs the
default scheduler available for the public API. This should help when
you want to get a scheduler and the default list of DAG mutations.

This also shrinks the list of default DAG mutations:
{Load|Store}ClusterDAGMutation and MacroFusionDAGMutation are no longer
added by default. Targets can easily add them if they need them. It also
makes it easier for targets to add alternative/custom macrofusion or
clustering mutations while staying with the default
createGenericSchedLive(). It also saves the callback back and forth in
TargetInstrInfo::enableClusterLoads()/enableClusterStores().

Differential Revision: https://reviews.llvm.org/D26986

llvm-svn: 288057

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Revert "(origin/master, origin/HEAD) MachineScheduler/ScheduleDAG: Add support to skipping a node."

Revert accidentally committed change.

This reverts commit r286655.

llvm-svn: 286656

MachineScheduler/ScheduleDAG: Add support to skipping a node.

The DAG mutators in the scheduler cannot really remove DAG nodes as
additional anlysis information such as ScheduleDAGToplogicalSort are

MachineScheduler/ScheduleDAG: Add support to skipping a node.

The DAG mutators in the scheduler cannot really remove DAG nodes as
additional anlysis information such as ScheduleDAGToplogicalSort are
already computed at this point and rely on a fixed number of DAG nodes.

Alleviate the missing removal with a new flag: Setting the new skip
flag on a node ignores it during scheduling.

llvm-svn: 286655

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ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCI

Push VRegUses/collectVRegUses() down the class hierarchy towards its
only user ScheduleDAGMILive.

NFCI: The initialization of the map hap

ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCI

Push VRegUses/collectVRegUses() down the class hierarchy towards its
only user ScheduleDAGMILive.

NFCI: The initialization of the map happens at a later point but that
should not matter.

This is in preparation to allow DAG mutators to merge nodes, which
relies on this map getting computed later.

llvm-svn: 286654

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MachineScheduler: Dump EntrySU/ExitSU if possible

llvm-svn: 286653

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

addSchedBarrierDeps() is supposed to add use operands to the ExitSU
node. The current implementation adds uses for calls/barrier instruc

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

addSchedBarrierDeps() is supposed to add use operands to the ExitSU
node. The current implementation adds uses for calls/barrier instruction
and the MBB live-outs in all other cases. The use
operands of conditional jump instructions were missed.

Also added code to macrofusion to set the latencies between nodes to
zero to avoid problems with the fusing nodes lingering around in the
pending list now.

Differential Revision: https://reviews.llvm.org/D25140

llvm-svn: 286544

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[MachineScheduler] Comments fixing.

The name/comment of the third argument to the ScheduleDAGMI constructor
is RemoveKillFlags and not IsPostRA. Only the comments are changed.

Review: A Trick
llvm-

[MachineScheduler] Comments fixing.

The name/comment of the third argument to the ScheduleDAGMI constructor
is RemoveKillFlags and not IsPostRA. Only the comments are changed.

Review: A Trick
llvm-svn: 286350

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Comment rewording in MachineScheduler.cpp.

Author: A Trick
llvm-svn: 285991

Fix differences in codegen between Linux and Windows toolchains

Summary:
There are differences in codegen between Linux and Windows due to:
1. Using std::sort which uses quicksort which is a

Fix differences in codegen between Linux and Windows toolchains

Summary:
There are differences in codegen between Linux and Windows due to:
1. Using std::sort which uses quicksort which is a non-stable sort.

2. Iterating over Set data structure where the iteration order is
non deterministic.

Reviewers: arsenm, grosbach, junbuml, zinob, MatzeB

Subscribers: MatzeB, wdng

Differential Revision: https://reviews.llvm.org/D25695

llvm-svn: 284441

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MachineScheduler: Slightly simplify release node

llvm-svn: 282201

MachineScheduler: Remove ineffective heuristic; NFC

Currently all nodes get added to the NextSU list when they are released,
so any candidate must be in that list, making the heuristic ineffective.

MachineScheduler: Remove ineffective heuristic; NFC

Currently all nodes get added to the NextSU list when they are released,
so any candidate must be in that list, making the heuristic ineffective.
Remove it for now, we can add it back later in a working fashion if
necessary.

llvm-svn: 282200

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MachineScheduler: Add constructor functions for the DAGMutations

Summary: This way they can be re-used by target-specific schedulers.

Reviewers: atrick, MatzeB, kparzysz

Subscribers: kparzysz, llv

MachineScheduler: Add constructor functions for the DAGMutations

Summary: This way they can be re-used by target-specific schedulers.

Reviewers: atrick, MatzeB, kparzysz

Subscribers: kparzysz, llvm-commits, MatzeB

Differential Revision: https://reviews.llvm.org/D23678

llvm-svn: 279305

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CodeGen: Avoid dereferencing end() when unconstifying iterators

Rather than doing a funny dance that relies on dereferencing end() not
crashing, add some API to MachineInstrBundleIterator to get a n

CodeGen: Avoid dereferencing end() when unconstifying iterators

Rather than doing a funny dance that relies on dereferencing end() not
crashing, add some API to MachineInstrBundleIterator to get a non-const
version of the iterator.

llvm-svn: 278870

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CodeGen: Avoid dereferencing end() in MachineScheduler

Check MachineInstr::isDebugValue for the same instruction as we're
calling isSchedBoundary, avoiding the possibility of dereferencing
end().

T

CodeGen: Avoid dereferencing end() in MachineScheduler

Check MachineInstr::isDebugValue for the same instruction as we're
calling isSchedBoundary, avoiding the possibility of dereferencing
end().

This is a functionality change even when I!=end(). Matthias had a look
and agrees this is the right resolution (as opposed to checking for
end()).

This is triggered by a huge number of tests, but they happen to
magically pass right now. I found this because WIP patches for PR26753
convert them into crashes.

llvm-svn: 278394

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Target: Remove unused arguments from overrideSchedPolicy, NFC

TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr*
arguments (begin and end) that invite implicit conversions from
Machine

Target: Remove unused arguments from overrideSchedPolicy, NFC

TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr*
arguments (begin and end) that invite implicit conversions from
MachineInstrBundleIterator. One option would be to change their type to
an iterator, but since they don't seem to have been used since the API
was added in 2010, I'm deleting the dead code.

llvm-svn: 274304

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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when th

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr. This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other. Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators. The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy. I couldn't run tests
for AVR since llc doesn't link with it turned on.

llvm-svn: 274189

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MachineScheduler: Remember top/bottom choice in bidirectional scheduling

Remember the last choice for the top/bottom scheduling boundary in
bidirectional scheduling mode. The top choice should not c

MachineScheduler: Remember top/bottom choice in bidirectional scheduling

Remember the last choice for the top/bottom scheduling boundary in
bidirectional scheduling mode. The top choice should not change if we
schedule at the bottom and vice versa.

This allows us to improve compiletime: We only recalculate the best pick
for one border and re-use the cached top-pick from the other border.

Differential Revision: http://reviews.llvm.org/D19350

llvm-svn: 273766

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MachineScheduler: Fully compare top/bottom candidates

In bidirectional scheduling this gives more stable results than just
comparing the "reason" fields of the top/bottom node because the reason
fie

MachineScheduler: Fully compare top/bottom candidates

In bidirectional scheduling this gives more stable results than just
comparing the "reason" fields of the top/bottom node because the reason
field may be higher depending on what other nodes are in the queue.

Differential Revision: http://reviews.llvm.org/D19401

llvm-svn: 273755

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MachineScheduler: Followup to debug message changes

Do not dump intermediate state of the pending queue anymore now that we
always dump the final state before picking.

llvm-svn: 273618

MachineScheduler: Improve debug messages

Consistenly display available and pending queues immediately before the
scheduling choice is done.

llvm-svn: 273615