- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remov

- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097

show more ...

Reapply r52988, "Simplify addRegisterKilled and addRegisterDead." The
254.gap failure was not due to this mod.

llvm-svn: 53068

Revert r52988. It broke 254.gap on x86-64.

llvm-svn: 53050

Simplify addRegisterKilled and addRegisterDead.

llvm-svn: 52988

Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
o

Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943

show more ...

Looks like this condition is inverted.

llvm-svn: 52841

Don't perform expensive queries checking for super and sub registers when we know that there aren't any.
This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s. Look for more i

Don't perform expensive queries checking for super and sub registers when we know that there aren't any.
This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s. Look for more improvements in this area soon!

llvm-svn: 52804

show more ...

Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction inst

Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.

llvm-svn: 51660

show more ...

Fix a broken doxygen comment, and reword it for clarity.

llvm-svn: 50687

Code clean up.

llvm-svn: 49783

Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348

detabify llvm, patch by Mike Stump!

llvm-svn: 48577

Refactor some code out of MachineSink into a MachineInstr query.

llvm-svn: 48311

Refactor code. Remove duplicated functions that basically do the same thing as
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927

Did I say 'e = getNumOperands()'? I meant --e, of course.

llvm-svn: 47875

Miscellaneous clean-ups based on Evan's feedback:

- Cleaned up how the prologue-epilogue inserter loops over the instructions.
- Instead of restarting the processing of an instruction if we remove a

Miscellaneous clean-ups based on Evan's feedback:

- Cleaned up how the prologue-epilogue inserter loops over the instructions.
- Instead of restarting the processing of an instruction if we remove an
implicit kill, just update the end iterator and make sure that the iterator
isn't incremented.

llvm-svn: 47870

show more ...

Go through the machine instruction's operands to make sure that we're not
marking both a super- and sub-register as "killed". This removes implicit uses
that are marked as "killed".

llvm-svn: 47862

Rename PrintableName to Name.

llvm-svn: 47629

Some platforms use the same name for 32-bit and 64-bit registers (like
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data

Some platforms use the same name for 32-bit and 64-bit registers (like
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.

llvm-svn: 47534

show more ...

Support a new type of MachineOperand, MO_FPImmediate, used for holding
FP Immediates, crazily enough

llvm-svn: 47117

Rename MRegisterInfo to TargetRegisterInfo.

llvm-svn: 46930

Also print alignment.

llvm-svn: 46895

Don't abort if a MemOperand is missing a SourceValue; just print it
as <unknown>. And make some minor adjustments to the MemOperand
dump format.

llvm-svn: 46853

Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue obj

Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827

show more ...

Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.

llvm-svn: 46623