#
9414665a |
| 24-Jul-2014 |
Hal Finkel <hfinkel@anl.gov> |
Add scoped-noalias metadata
This commit adds scoped noalias metadata. The primary motivations for this feature are: 1. To preserve noalias function attribute information when inlining 2. To prov
Add scoped-noalias metadata
This commit adds scoped noalias metadata. The primary motivations for this feature are: 1. To preserve noalias function attribute information when inlining 2. To provide the ability to model block-scope C99 restrict pointers
Neither of these two abilities are added here, only the necessary infrastructure. In fact, there should be no change to existing functionality, only the addition of new features. The logic that converts noalias function parameters into this metadata during inlining will come in a follow-up commit.
What is added here is the ability to generally specify noalias memory-access sets. Regarding the metadata, alias-analysis scopes are defined similar to TBAA nodes:
!scope0 = metadata !{ metadata !"scope of foo()" } !scope1 = metadata !{ metadata !"scope 1", metadata !scope0 } !scope2 = metadata !{ metadata !"scope 2", metadata !scope0 } !scope3 = metadata !{ metadata !"scope 2.1", metadata !scope2 } !scope4 = metadata !{ metadata !"scope 2.2", metadata !scope2 }
Loads and stores can be tagged with an alias-analysis scope, and also, with a noalias tag for a specific scope:
... = load %ptr1, !alias.scope !{ !scope1 } ... = load %ptr2, !alias.scope !{ !scope1, !scope2 }, !noalias !{ !scope1 }
When evaluating an aliasing query, if one of the instructions is associated with an alias.scope id that is identical to the noalias scope associated with the other instruction, or is a descendant (in the scope hierarchy) of the noalias scope associated with the other instruction, then the two memory accesses are assumed not to alias.
Note that is the first element of the scope metadata is a string, then it can be combined accross functions and translation units. The string can be replaced by a self-reference to create globally unqiue scope identifiers.
[Note: This overview is slightly stylized, since the metadata nodes really need to just be numbers (!0 instead of !scope0), and the scope lists are also global unnamed metadata.]
Existing noalias metadata in a callee is "cloned" for use by the inlined code. This is necessary because the aliasing scopes are unique to each call site (because of possible control dependencies on the aliasing properties). For example, consider a function: foo(noalias a, noalias b) { *a = *b; } that gets inlined into bar() { ... if (...) foo(a1, b1); ... if (...) foo(a2, b2); } -- now just because we know that a1 does not alias with b1 at the first call site, and a2 does not alias with b2 at the second call site, we cannot let inlining these functons have the metadata imply that a1 does not alias with b2.
llvm-svn: 213864
show more ...
|
#
cc39b675 |
| 24-Jul-2014 |
Hal Finkel <hfinkel@anl.gov> |
AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information after inlining, and the representation of block-level __restrict__ pointer
AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information after inlining, and the representation of block-level __restrict__ pointer information (etc.), additional kinds of aliasing metadata will be introduced. This metadata needs to be carried around in AliasAnalysis::Location objects (and MMOs at the SDAG level), and so we need to generalize the current scheme (which is hard-coded to just one TBAA MDNode*).
This commit introduces only the necessary refactoring to allow for the introduction of other aliasing metadata types, but does not actually introduce any (that will come in a follow-up commit). What it does introduce is a new AAMDNodes structure to hold all of the aliasing metadata nodes associated with a particular memory-accessing instruction, and uses that structure instead of the raw MDNode* in AliasAnalysis::Location, etc.
No functionality change intended.
llvm-svn: 213859
show more ...
|
Revision tags: llvmorg-3.5.0-rc1, llvmorg-3.4.2, llvmorg-3.4.2-rc1 |
|
#
da925c0d |
| 07-May-2014 |
Zinovy Nis <zinovy.nis@gmail.com> |
[BUG][REFACTOR] 1) Fix for printing debug locations for absolute paths. 2) Location printing is moved into public method DebugLoc::print() to avoid re-inventing the wheel.
Differential Revision: htt
[BUG][REFACTOR] 1) Fix for printing debug locations for absolute paths. 2) Location printing is moved into public method DebugLoc::print() to avoid re-inventing the wheel.
Differential Revision: http://reviews.llvm.org/D3513
llvm-svn: 208177
show more ...
|
Revision tags: llvmorg-3.4.1, llvmorg-3.4.1-rc2 |
|
#
aad475b3 |
| 15-Apr-2014 |
Nick Lewycky <nicholas@mxc.ca> |
Break PseudoSourceValue out of the Value hierarchy. It is now the root of its own tree containing FixedStackPseudoSourceValue (which you can use isa/dyn_cast on) and MipsCallEntry (which you can't).
Break PseudoSourceValue out of the Value hierarchy. It is now the root of its own tree containing FixedStackPseudoSourceValue (which you can use isa/dyn_cast on) and MipsCallEntry (which you can't). Anything that needs to use either a PseudoSourceValue* and Value* is strongly encouraged to use a MachinePointerInfo instead.
llvm-svn: 206255
show more ...
|
#
c0196b1b |
| 14-Apr-2014 |
Craig Topper <craig.topper@gmail.com> |
[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
llvm-svn: 206142
|
Revision tags: llvmorg-3.4.1-rc1 |
|
#
c97727a4 |
| 21-Mar-2014 |
Arnaud A. de Grandmaison <arnaud.adegm@gmail.com> |
Remove some dead assignements found by scan-build
llvm-svn: 204526
|
#
7c8189c6 |
| 17-Mar-2014 |
Lang Hames <lhames@gmail.com> |
[X86] New and improved VZeroUpperInserter optimization.
- Adds support for inserting vzerouppers before tail-calls. This is enabled implicitly by having MachineInstr::copyImplicitOps preserve re
[X86] New and improved VZeroUpperInserter optimization.
- Adds support for inserting vzerouppers before tail-calls. This is enabled implicitly by having MachineInstr::copyImplicitOps preserve regmask operands, which allows VZeroUpperInserter to see where tail-calls use vector registers.
- Fixes a bug that caused the previous version of this optimization to miss some vzeroupper insertion points in loops. (Loops-with-vector-code that followed loops-without-vector-code were mistakenly overlooked by the previous version).
- New algorithm never revisits instructions.
Fixes <rdar://problem/16228798>
llvm-svn: 204021
show more ...
|
#
75c9e6de |
| 15-Mar-2014 |
Arnaud A. de Grandmaison <arnaud.adegm@gmail.com> |
Remove some dead assignements found by scan-build
llvm-svn: 204013
|
#
b1f25f1b |
| 07-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were cr
Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label.
The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping.
The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function.
I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better.
The net result is that we don't create temporary labels that are never used.
llvm-svn: 203204
show more ...
|
#
9a4c9e59 |
| 06-Mar-2014 |
Chandler Carruth <chandlerc@gmail.com> |
[Layering] Move DebugInfo.h into the IR library where its implementation already lives.
llvm-svn: 203046
|
#
b6d0bd48 |
| 02-Mar-2014 |
Benjamin Kramer <benny.kra@googlemail.com> |
[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.
llvm-svn: 202636
|
#
d48cdbf0 |
| 09-Jan-2014 |
Chandler Carruth <chandlerc@gmail.com> |
Put the functionality for printing a value to a raw_ostream as an operand into the Value interface just like the core print method is. That gives a more conistent organization to the IR printing inte
Put the functionality for printing a value to a raw_ostream as an operand into the Value interface just like the core print method is. That gives a more conistent organization to the IR printing interfaces -- they are all attached to the IR objects themselves. Also, update all the users.
This removes the 'Writer.h' header which contained only a single function declaration.
llvm-svn: 198836
show more ...
|
#
9aca918d |
| 07-Jan-2014 |
Chandler Carruth <chandlerc@gmail.com> |
Move the LLVM IR asm writer header files into the IR directory, as they are part of the core IR library in order to support dumping and other basic functionality.
Rename the 'Assembly' include direc
Move the LLVM IR asm writer header files into the IR directory, as they are part of the core IR library in order to support dumping and other basic functionality.
Rename the 'Assembly' include directory to 'AsmParser' to match the library name and the only functionality left their -- printing has been in the core IR library for quite some time.
Update all of the #includes to match.
All of this started because I wanted to have the layering in good shape before I started adding support for printing LLVM IR using the new pass infrastructure, and commandline support for the new pass infrastructure.
llvm-svn: 198688
show more ...
|
#
1fb3362a |
| 02-Jan-2014 |
Quentin Colombet <qcolombet@apple.com> |
[RegAlloc] Make tryInstructionSplit less aggressive.
The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the ent
[RegAlloc] Make tryInstructionSplit less aggressive.
The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the entire live-range (this is a last chance split before falling back to spill). The goal is to have a big live-range that is unconstrained (i.e., that can use the largest legal register class) and several small local live-range that carry the constraints implied by each instruction. E.g., Let csti be the constraints on operation i.
V1= op1 V1(cst1) op2 V1(cst2)
V1 live-range is constrained on the intersection of cst1 and cst2.
tryInstructionSplit relaxes those constraints by aggressively splitting each def/use point: V1= V2 = V1 V3 = V2 op1 V3(cst1) V4 = V2 op2 V4(cst2)
Because of how the coalescer infrastructure works, each new variable (V3, V4) that is alive at the same time as V1 (or its copy, here V2) interfere with V1. Thus, we end up with an uncoalescable copy for each split point.
To make tryInstructionSplit less aggressive, we check if the split point actually relaxes the constraints on the whole live-range. If it does not, we do not insert it. Indeed, it will not help the global allocation problem: - V1 will have the same constraints. - V1 will have the same interference + possibly the newly added split variable VS. - VS will produce an uncoalesceable copy if alive at the same time as V1.
<rdar://problem/15570057>
llvm-svn: 198369
show more ...
|
Revision tags: llvmorg-3.4.0, llvmorg-3.4.0-rc3 |
|
#
e8294753 |
| 14-Dec-2013 |
Juergen Ributzka <juergen@apple.com> |
[Stackmap] Liveness Analysis Pass
This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each ba
[Stackmap] Liveness Analysis Pass
This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction.
Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap.
This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved.
Reviewed by Andy
llvm-svn: 197317
show more ...
|
#
68c38fd6 |
| 14-Dec-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Print the address space of a MachineMemOperand
llvm-svn: 197288
|
#
7bcb0100 |
| 13-Dec-2013 |
Andrew Trick <atrick@apple.com> |
Revert "Liveness Analysis Pass"
This reverts commit r197254.
This was an accidental merge of Juergen's patch. It will be checked in shortly, but wasn't meant to go in quite yet.
Conflicts: includ
Revert "Liveness Analysis Pass"
This reverts commit r197254.
This was an accidental merge of Juergen's patch. It will be checked in shortly, but wasn't meant to go in quite yet.
Conflicts: include/llvm/CodeGen/StackMaps.h lib/CodeGen/StackMaps.cpp test/CodeGen/X86/stackmap-liveness.ll
llvm-svn: 197260
show more ...
|
#
8d6a6584 |
| 13-Dec-2013 |
Andrew Trick <atrick@apple.com> |
Liveness Analysis Pass
llvm-svn: 197254
|
Revision tags: llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1 |
|
#
eb4a6e7c |
| 15-Oct-2013 |
Pekka Jaaskelainen <pekka.jaaskelainen@tut.fi> |
Guard the debug temp variable with NDEBUG to avoid warning/error with NDEBUG defined.
llvm-svn: 192709
|
#
eb08e2e0 |
| 15-Oct-2013 |
Pekka Jaaskelainen <pekka.jaaskelainen@tut.fi> |
Do not assert when trying to add a meta data operand with MachineInstr::addOperand().
llvm-svn: 192707
|
#
1965bfa4 |
| 10-Oct-2013 |
Matthias Braun <matze@braunis.de> |
Rename parameter: defined regs are not incoming.
llvm-svn: 192391
|
Revision tags: llvmorg-3.3.1-rc1 |
|
#
c8a4e385 |
| 05-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove dead function.
llvm-svn: 185731
|
#
983a16c0 |
| 28-Jun-2013 |
Manman Ren <mren@apple.com> |
Debug Info: clean up usage of Verify.
No functionality change. It should suffice to check the type of a debug info metadata, instead of calling Verify. For cases where we know the type of a DI metad
Debug Info: clean up usage of Verify.
No functionality change. It should suffice to check the type of a debug info metadata, instead of calling Verify. For cases where we know the type of a DI metadata, use assert.
Also update testing cases to make them conform to the format of DI classes.
llvm-svn: 185135
show more ...
|
Revision tags: llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1 |
|
#
4acf7dd8 |
| 05-Feb-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists.
llvm-
Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists.
llvm-svn: 174417
show more ...
|
#
b36388a1 |
| 25-Jan-2013 |
Andrew Trick <atrick@apple.com> |
ScheduleDAG: colorize the DOT graph and improve formatting.
llvm-svn: 173431
|