Revision tags: llvmorg-3.9.0-rc1, llvmorg-3.8.1, llvmorg-3.8.1-rc1 |
|
#
8f4d43a4 |
| 02-Jun-2016 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Make MachineCopyPropagation preserve CFG
This doesn't touch it as far as I can tell.
llvm-svn: 271445
|
#
aa641a51 |
| 22-Apr-2016 |
Andrew Kaylor <andrew.kaylor@intel.com> |
Re-commit optimization bisect support (r267022) without new pass manager support.
The original commit was reverted because of a buildbot problem with LazyCallGraph::SCC handling (not related to the
Re-commit optimization bisect support (r267022) without new pass manager support.
The original commit was reverted because of a buildbot problem with LazyCallGraph::SCC handling (not related to the OptBisect handling).
Differential Revision: http://reviews.llvm.org/D19172
llvm-svn: 267231
show more ...
|
#
6013f45f |
| 22-Apr-2016 |
Vedant Kumar <vsk@apple.com> |
Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549
llvm-s
Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549
llvm-svn: 267115
show more ...
|
#
f0f27929 |
| 21-Apr-2016 |
Andrew Kaylor <andrew.kaylor@intel.com> |
Initial implementation of optimization bisect support.
This patch implements a optimization bisect feature, which will allow optimizations to be selectively disabled at compile time in order to trac
Initial implementation of optimization bisect support.
This patch implements a optimization bisect feature, which will allow optimizations to be selectively disabled at compile time in order to track down test failures that are caused by incorrect optimizations.
The bisection is enabled using a new command line option (-opt-bisect-limit). Individual passes that may be skipped call the OptBisect object (via an LLVMContext) to see if they should be skipped based on the bisect limit. A finer level of control (disabling individual transformations) can be managed through an addition OptBisect method, but this is not yet used.
The skip checking in this implementation is based on (and replaces) the skipOptnoneFunction check. Where that check was being called, a new call has been inserted in its place which checks the bisect limit and the optnone attribute. A new function call has been added for module and SCC passes that behaves in a similar way.
Differential Revision: http://reviews.llvm.org/D19172
llvm-svn: 267022
show more ...
|
#
ad154c83 |
| 28-Mar-2016 |
Derek Schuff <dschuff@google.com> |
Introduce MachineFunctionProperties and the AllVRegsAllocated property
MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing
Introduce MachineFunctionProperties and the AllVRegsAllocated property
MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left.
With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior.
This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones.
Reviewers: qcolombet, hfinkel
Differential Revision: http://reviews.llvm.org/D18421
llvm-svn: 264593
show more ...
|
#
36c53fe1 |
| 25-Mar-2016 |
Jun Bum Lim <junbuml@codeaurora.org> |
[MachineCopyPropagation] Expose more dead copies across instructions with regmasks
When encountering instructions with regmasks, instead of cleaning up all the elements in MaybeDeadCopies map, remov
[MachineCopyPropagation] Expose more dead copies across instructions with regmasks
When encountering instructions with regmasks, instead of cleaning up all the elements in MaybeDeadCopies map, remove only the instructions erased. By keeping more instruction in MaybeDeadCopies, this change will expose more dead copies across instructions with regmasks.
llvm-svn: 264462
show more ...
|
Revision tags: llvmorg-3.8.0 |
|
#
9dcd65f4 |
| 26-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Catch copies of the form A<-B;A<-B
Differential Revision: http://reviews.llvm.org/D17475
llvm-svn: 261966
|
#
e39ff706 |
| 26-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Keep scanning through instructions with regmasks
This also simplifies the code by removing the overly conservative NoInterveningSideEffect() function. This function checked:
MachineCopyPropagation: Keep scanning through instructions with regmasks
This also simplifies the code by removing the overly conservative NoInterveningSideEffect() function. This function checked: - That the two copies belong to the same block: We only process one block at a time and clear our maps in between it is impossible to find a copy from a different block. - There is no terminator between the two copy instructions: This is not allowed anyway (the MachineVerifier would complain) - Does not have instructions with hasUnmodeledSideEffects() or isCall() set: Even for those instructuction we must have all clobbers/defs of registers explicit as an operand. If the register is explicitely clobbered we would never come to the point of checking for NoInterveningSideEffect() anyway.
(I also checked this with a temporary build of the test-suite with all potentially failing conditions in NoInterveningSideEffect() turned into asserts)
Differential Revision: http://reviews.llvm.org/D17474
llvm-svn: 261965
show more ...
|
Revision tags: llvmorg-3.8.0-rc3 |
|
#
c5b668de |
| 22-Feb-2016 |
Duncan P. N. Exon Smith <dexonsmith@apple.com> |
Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is better: http://lists.llvm.org/pipermail/llvm-commits/Week
Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is better: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html
I'll recommit if we get consensus that it's the right direction.
llvm-svn: 261567
show more ...
|
#
dc0848c0 |
| 21-Feb-2016 |
Duncan P. N. Exon Smith <dexonsmith@apple.com> |
CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is overloaded when talking about MachineInstr.
- Downcast to ilist_node
CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is overloaded when talking about MachineInstr.
- Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so that ilist_node::getIterator() is still available. - Add it back as MachineInstr::getInstrIterator(). This matches the naming in MachineBasicBlock. - Add MachineInstr::getBundleIterator(). This is explicitly called "bundle" (not matching MachineBasicBlock) to disintinguish it clearly from ilist_node::getIterator(). - Update all calls. Some of these I switched to `auto` to remove boiler-plate, since the new name is clear about the type.
There was one call I updated that looked fishy, but it wasn't clear what the right answer was. This was in X86FrameLowering::inlineStackProbe(), added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to leave the behaviour unchanged, but I'll reply to the original commit on the list in a moment.
llvm-svn: 261504
show more ...
|
#
c65e904b |
| 20-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Introduce Reg2MIMap typedef; NFC
llvm-svn: 261408
|
#
bd18d751 |
| 20-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Move variables from function to pass
This avoids unnecessarily passing them around when calling helper functions. It may also be slightly faster to call clear() on the datast
MachineCopyPropagation: Move variables from function to pass
This avoids unnecessarily passing them around when calling helper functions. It may also be slightly faster to call clear() on the datastructures instead of freshly initializing them for each block.
llvm-svn: 261407
show more ...
|
#
273575dc |
| 20-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Use ranged for, cleanup; NFC
llvm-svn: 261406
|
#
57b5f11a |
| 20-Feb-2016 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Use assert() instead of if{report_error()} for 'impossible' condition
llvm-svn: 261405
|
#
59df5e89 |
| 03-Feb-2016 |
Jun Bum Lim <junbuml@codeaurora.org> |
[MachineCopyPropagation] Fix comment. NFC
Reviewers: MatzeB, qcolombet, jmolloy, mcrosier
Subscribers: llvm-commits, mcrosier
Differential Revision: http://reviews.llvm.org/D16806
llvm-svn: 259656
|
Revision tags: llvmorg-3.8.0-rc2, llvmorg-3.8.0-rc1, llvmorg-3.7.1, llvmorg-3.7.1-rc2, llvmorg-3.7.1-rc1, llvmorg-3.7.0, llvmorg-3.7.0-rc4, llvmorg-3.7.0-rc3, studio-1.4, llvmorg-3.7.0-rc2, llvmorg-3.7.0-rc1, llvmorg-3.6.2, llvmorg-3.6.2-rc1 |
|
#
f00654e3 |
| 23-Jun-2015 |
Alexander Kornienko <alexfh@google.com> |
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.
llvm-svn: 240390
|
#
70bc5f13 |
| 19-Jun-2015 |
Alexander Kornienko <alexfh@google.com> |
Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:
tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-c
Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:
tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/
Thanks to Eugene Kosov for the original patch!
llvm-svn: 240137
show more ...
|
#
165d4671 |
| 29-May-2015 |
Matthias Braun <matze@braunis.de> |
MachineCopyPropagation: Remove the copies instead of using KILL instructions.
For some history here see the commit messages of r199797 and r169060.
The original intent was to fix cases like:
%EAX<
MachineCopyPropagation: Remove the copies instead of using KILL instructions.
For some history here see the commit messages of r199797 and r169060.
The original intent was to fix cases like:
%EAX<def> = COPY %ECX<kill>, %RAX<imp-def> %RCX<def> = COPY %RAX<kill>
where simply removing the copies would have RCX undefined as in terms of machine operands only the ECX part of it is defined. The machine verifier would complain about this so 169060 changed such COPY instructions into KILL instructions so some super-register imp-defs would be preserved. In r199797 it was finally decided to always do this regardless of super-register defs.
But this is wrong, consider: R1 = COPY R0 ... R0 = COPY R1 getting changed to: R1 = KILL R0 ... R0 = KILL R1
It now looks like R0 dies at the first KILL and won't be alive until the second KILL, while in reality R0 is alive and must not change in this part of the program.
As this only happens after register allocation there is not much code still performing liveness queries so the issue was not noticed. In fact I didn't manage to create a testcase for this, without unrelated changes I am working on at the moment.
The fix is simple: As of r223896 the MachineVerifier allows reads from partially defined registers, so the whole transforming COPY->KILL thing is not necessary anymore. This patch also changes a similar (but more benign case as the def and src are the same register) case in the VirtRegRewriter.
Differential Revision: http://reviews.llvm.org/D10117
llvm-svn: 238588
show more ...
|
#
75afbfd4 |
| 28-May-2015 |
Quentin Colombet <qcolombet@apple.com> |
[MachineCopyPropagation] Fix a bug with undef handling when the value is actualy alive. Test case will follow.
llvm-svn: 238518
|
Revision tags: llvmorg-3.6.1, llvmorg-3.6.1-rc1 |
|
#
796d906e |
| 23-Apr-2015 |
Quentin Colombet <qcolombet@apple.com> |
[MachineCopyPropagation] Handle undef flags conservatively so that we do not remove copies that are useful after breaking some hardware dependencies. In other words, handle this kind of situations co
[MachineCopyPropagation] Handle undef flags conservatively so that we do not remove copies that are useful after breaking some hardware dependencies. In other words, handle this kind of situations conservatively by assuming reg2 is redefined by the undef flag. reg1 = copy reg2 = inst reg2<undef> reg2 = copy reg1 Copy propagation used to remove the last copy. This is incorrect because the undef flag on reg2 in inst, allows next passes to put whatever trashed value in reg2 that may help. In practice we end up with this code: reg1 = copy reg2 reg2 = 0 = inst reg2<undef> reg2 = copy reg1
This fixes PR21743.
llvm-svn: 235647
show more ...
|
Revision tags: llvmorg-3.5.2, llvmorg-3.5.2-rc1 |
|
#
04183242 |
| 13-Mar-2015 |
Hao Liu <Hao.Liu@arm.com> |
[MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction sequences as follows %Q5_Q6<def> = COPY %Q2_Q3 %D5<def> = %D3<def> = %D3<def> = COPY %D6 // Incorrectl
[MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction sequences as follows %Q5_Q6<def> = COPY %Q2_Q3 %D5<def> = %D3<def> = %D3<def> = COPY %D6 // Incorrectly removed in MachineCopyPropagation Using of %D3 results in incorrect result ...
Reviewed in http://reviews.llvm.org/D8242
llvm-svn: 232142
show more ...
|
Revision tags: llvmorg-3.6.0, llvmorg-3.6.0-rc4, llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2, llvmorg-3.6.0-rc1, llvmorg-3.5.1, llvmorg-3.5.1-rc2, llvmorg-3.5.1-rc1, llvmorg-3.5.0, llvmorg-3.5.0-rc4, llvmorg-3.5.0-rc3, llvmorg-3.5.0-rc2 |
|
#
fc6de428 |
| 05-Aug-2014 |
Eric Christopher <echristo@gmail.com> |
Have MachineFunction cache a pointer to the subtarget to make lookups shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lo
Have MachineFunction cache a pointer to the subtarget to make lookups shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily.
Update the MIPS subtarget switching machinery to update this pointer at the same time it runs.
llvm-svn: 214838
show more ...
|
#
d913448b |
| 04-Aug-2014 |
Eric Christopher <echristo@gmail.com> |
Remove the TargetMachine forwards for TargetSubtargetInfo based information and update all callers. No functional change.
llvm-svn: 214781
|
Revision tags: llvmorg-3.5.0-rc1, llvmorg-3.4.2, llvmorg-3.4.2-rc1, llvmorg-3.4.1, llvmorg-3.4.1-rc2 |
|
#
1b9dde08 |
| 22-Apr-2014 |
Chandler Carruth <chandlerc@gmail.com> |
[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind
[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers.
Other sub-trees will follow.
llvm-svn: 206837
show more ...
|
Revision tags: llvmorg-3.4.1-rc1 |
|
#
7c99ec5b |
| 31-Mar-2014 |
Paul Robinson <paul_robinson@playstation.sony.com> |
Disable each MachineFunctionPass for 'optnone' functions, unless that pass normally runs at optimization level None, or is part of the register allocation pipeline.
llvm-svn: 205228
|