Revision tags: llvmorg-21-init |
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#
bc1e699d |
| 20-Jan-2025 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Avoid repeated hash lookups (NFC) (#123557)
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#
9e436c2d |
| 16-Jan-2025 |
Oliver Stannard <oliver.stannard@arm.com> |
[MachineCP] Correctly handle register masks and sub-registers (#122734)
When passing an instruction with a register mask, the machine copy
propagation pass was dropping the information about some c
[MachineCP] Correctly handle register masks and sub-registers (#122734)
When passing an instruction with a register mask, the machine copy
propagation pass was dropping the information about some copy
instructions which define a register which is preserved by the mask,
because that register overlaps a register which is partially clobbered
by it. This resulted in a miscompilation for AArch64, because this
caused a live copy to be considered dead.
The fix is to clobber register masks by finding the set of reg units
which is preserved by the mask, and clobbering all units not in that
set.
This is based on #122472, and fixes the compile time performance
regressions which were caused by that.
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Revision tags: llvmorg-19.1.7 |
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#
d6f7f2a5 |
| 13-Jan-2025 |
Nikita Popov <npopov@redhat.com> |
Revert "[MachineCP] Correctly handle register masks and sub-registers (#122472)"
This reverts commit e2a071ece58790f8dd4886e998033cab82e906fb.
This causes a large compile-time regression.
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#
e2a071ec |
| 13-Jan-2025 |
Oliver Stannard <oliver.stannard@arm.com> |
[MachineCP] Correctly handle register masks and sub-registers (#122472)
When passing an instruction with a register mask, the machine copy
propagation pass was dropping the information about some c
[MachineCP] Correctly handle register masks and sub-registers (#122472)
When passing an instruction with a register mask, the machine copy
propagation pass was dropping the information about some copy
instructions which define a register which is preserved by the mask,
because that register overlaps a register which is partially clobbered
by it. This resulted in a miscompilation for AArch64, because this
caused a live copy to be considered dead.
The fix is to clobber register masks by finding the set of reg units
which is preserved by the mask, and clobbering all units not in that
set.
show more ...
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Revision tags: llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3 |
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#
401d123a |
| 23-Oct-2024 |
Vladimir Radosavljevic <129192835+vladimirradosavljevic@users.noreply.github.com> |
[MCP] Optimize copies when src is used during backward propagation (#111130)
Before this patch, redundant COPY couldn't be removed for the following
case:
```
$R0 = OP ...
... // Read of %R0
[MCP] Optimize copies when src is used during backward propagation (#111130)
Before this patch, redundant COPY couldn't be removed for the following
case:
```
$R0 = OP ...
... // Read of %R0
$R1 = COPY killed $R0
```
This patch adds support for tracking the users of the source register
during backward propagation, so that we can remove the redundant COPY in
the above case and optimize it to:
```
$R1 = OP ...
... // Replace all uses of %R0 with $R1
```
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Revision tags: llvmorg-19.1.2 |
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#
dabb0ddb |
| 10-Oct-2024 |
Vladimir Radosavljevic <129192835+vladimirradosavljevic@users.noreply.github.com> |
[MCP] Skip invalidating def constant regs during forward propagation (#111129)
Before this patch, redundant COPY couldn't be removed for the following
case:
```
%reg1 = COPY %const-reg
... /
[MCP] Skip invalidating def constant regs during forward propagation (#111129)
Before this patch, redundant COPY couldn't be removed for the following
case:
```
%reg1 = COPY %const-reg
... // There is a def of %const-reg
%reg2 = COPY killed %reg1
```
where this can be optimized to:
```
... // There is a def of %const-reg
%reg2 = COPY %const-reg
```
This patch allows for such optimization by not invalidating defined
constant registers. This is safe, as architectures like AArch64 and
RISCV replace a dead definition of a GPR with a zero constant register
for certain instructions.
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Revision tags: llvmorg-19.1.1, llvmorg-19.1.0 |
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#
b9d85b12 |
| 13-Sep-2024 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use DenseMap::operator[] (NFC) (#108489)
Once we modernize CopyInfo with default member initializations,
Copies.insert({Unit, ...})
becomes equivalent to:
Copies.try_emplace(U
[CodeGen] Use DenseMap::operator[] (NFC) (#108489)
Once we modernize CopyInfo with default member initializations,
Copies.insert({Unit, ...})
becomes equivalent to:
Copies.try_emplace(Unit)
which we can simplify further down to Copies[Unit].
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Revision tags: llvmorg-19.1.0-rc4 |
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#
2def1c44 |
| 28-Aug-2024 |
Piyou Chen <piyou.chen@sifive.com> |
[RISCV][MCP] Remove redundant move from tail duplication (#89865)
Tail duplication will generate the redundant move before return. It is
because the MachineCopyPropogation can't recognize COPY aft
[RISCV][MCP] Remove redundant move from tail duplication (#89865)
Tail duplication will generate the redundant move before return. It is
because the MachineCopyPropogation can't recognize COPY after post-RA
pseudoExpand.
This patch make MachineCopyPropogation recognize `%0 = ADDI %1, 0` as
COPY
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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#
e274d5f6 |
| 11-Jul-2024 |
Kai Luo <lkail@cn.ibm.com> |
[MCP] Use MCRegUnit as the key type of CopyTracker::Copies map. NFC. (#98277)
`CopyTracker` is in fact tracking at RegUnit level, not MCRegister.
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7 |
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#
b5db2e19 |
| 30-May-2024 |
David Green <david.green@arm.com> |
[MCP] Remove unused TII argument. NFC
Last used in e35fbf5c04f4719db8ff7c7a993cbf96bb706903.
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Revision tags: llvmorg-18.1.6, llvmorg-18.1.5 |
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#
f6d431f2 |
| 24-Apr-2024 |
Xu Zhang <simonzgx@gmail.com> |
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI parameters, as shown in issue #82411.
Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`, `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.
After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3 |
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#
23d45e55 |
| 28-Mar-2024 |
Craig Topper <craig.topper@sifive.com> |
[MCP] Remove dead copies from basic blocks with successors. (#86973)
Previously we wouldn't remove dead copies from basic blocks with
successors. The comment said we didn't want to trust the live-i
[MCP] Remove dead copies from basic blocks with successors. (#86973)
Previously we wouldn't remove dead copies from basic blocks with
successors. The comment said we didn't want to trust the live-in lists.
The comment is very old so I'm not sure if that's still a concern today.
This patch checks the live-in lists and removes copies from
MaybeDeadCopies if they are referenced by any live-ins in any
successors. We only do this if the tracksLiveness property is set. If
that property is not set, we retain the old behavior.
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#
f9081354 |
| 28-Mar-2024 |
Craig Topper <craig.topper@sifive.com> |
[MCP] Use MachineInstr::all_defs instead of MachineInstr::defs in hasOverlappingMultipleDef. (#86889)
defs does not return the defs for inline assembly. We need to use
all_defs to find them.
Fix
[MCP] Use MachineInstr::all_defs instead of MachineInstr::defs in hasOverlappingMultipleDef. (#86889)
defs does not return the defs for inline assembly. We need to use
all_defs to find them.
Fixes #86880.
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Revision tags: llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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#
8ed1291d |
| 23-Jan-2024 |
Kazu Hirata <kazu@google.com> |
[MachineCopyPropagation] Make a SmallVector larger (NFC) (#79106)
This patch makes a SmallVector slightly larger. We encounter quite a
few instructions with 3 or 4 defs but very few beyond that on
[MachineCopyPropagation] Make a SmallVector larger (NFC) (#79106)
This patch makes a SmallVector slightly larger. We encounter quite a
few instructions with 3 or 4 defs but very few beyond that on X86.
This saves 0.39% of heap allocations during the compilation of a large
preprocessed file, namely X86ISelLowering.cpp, for the X86 target.
show more ...
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#
dc1fadef |
| 26-Dec-2023 |
Vettel <924105575@qq.com> |
[MCP] Enhance MCP copy Instruction removal for special case(reapply) (#74239)
Machine Copy Propagation Pass may lose some opportunities to further
remove the redundant copy instructions during the
[MCP] Enhance MCP copy Instruction removal for special case(reapply) (#74239)
Machine Copy Propagation Pass may lose some opportunities to further
remove the redundant copy instructions during the ForwardCopyPropagateBlock
procedure. When we Clobber a "Def" register, we also need to remove the record
from the copy maps that indicates "Src" defined "Def" to ensure the correct semantics
of the ClobberRegister function. This patch reapplies #70778 and addresses the corner
case bug #73512 specific to the AMDGPU backend. Additionally, it refines the criteria
for removing empty records from the copy maps, thereby enhancing overall safety.
For more information, please see the C++ test case generated code in
"vector.body" after the MCP Pass: https://gcc.godbolt.org/z/nK4oMaWv5.
show more ...
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Revision tags: llvmorg-17.0.6 |
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#
30afb215 |
| 27-Nov-2023 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
Revert "[MCP] Enhance MCP copy Instruction removal for special case (#70778)"
This reverts commit cae46f6210293ba4d3568eb21b935d438934290d.
Reverted due to miscompiles. See https://github.com/llvm/
Revert "[MCP] Enhance MCP copy Instruction removal for special case (#70778)"
This reverts commit cae46f6210293ba4d3568eb21b935d438934290d.
Reverted due to miscompiles. See https://github.com/llvm/llvm-project/issues/73512
show more ...
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#
cae46f62 |
| 22-Nov-2023 |
Vettel <924105575@qq.com> |
[MCP] Enhance MCP copy Instruction removal for special case (#70778)
Machine Copy Propagation Pass may lose some opportunities to further
remove the redundant copy instructions during the ForwardCo
[MCP] Enhance MCP copy Instruction removal for special case (#70778)
Machine Copy Propagation Pass may lose some opportunities to further
remove the redundant copy instructions during the ForwardCopyPropagateBlock
procedure. When we Clobber a "Def" register, we also need to remove the record
from the copy maps that indicates "Src" defined "Def" to ensure the correct semantics
of the ClobberRegister function.
For more information, please see the C++ test case generated code in
"vector.body" after the MCP Pass: https://gcc.godbolt.org/z/nK4oMaWv5.
show more ...
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Revision tags: llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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#
ce8c2285 |
| 23-Sep-2023 |
Kazu Hirata <kazu@google.com> |
Use llvm::drop_begin and llvm::drop_end (NFC)
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3 |
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#
f76ffc1f |
| 09-Aug-2023 |
Jeffrey Byrnes <Jeffrey.Byrnes@amd.com> |
[MCP] Invalidate copy for super register in copy source
We must also track the super sources of a copy, otherwise we introduce a sort of subtle bug.
Consider:
1. DEF r0:r1 2. USE r1 3. r6:r9 =
[MCP] Invalidate copy for super register in copy source
We must also track the super sources of a copy, otherwise we introduce a sort of subtle bug.
Consider:
1. DEF r0:r1 2. USE r1 3. r6:r9 = COPY r10:r13 4. r14:15 = COPY r0:r1 5. USE r6 6.. r1:4 = COPY r6:9
BackwardCopyPropagateBlock processes the instructions from bottom up. After processing 6., we will have propagatable copy for r1-r4 and r6-r9. After 5., we invalidate and erase the propagatble copy for r1-r4 and r6 but not for r7-r9.
The issue is that when processing 3., data structures still say we have valid copies for dest regs r7-r9 (from 6.). The corresponding defs for these registers in 6. are r1:r4, which we mark as registers to invalidate. When invalidating, we find the copy that corresponds to r1 is 4. (this was added when processing 4.), and we say that r1 now maps to unpropagatable copies. Thus, when we process 2., we do not have a valid copy, but when we process 1. we do -- because the mapped copy for subregister r0 was never invalidated.
The net result is to propagate the copy from 4. to 1., and replace DEF r0:r1 with DEF r14:r15. Then, we have a use before def in 2.
The main issue is that we have an inconsitent state between which def regs and which src regs are valid. When processing 5., we mark all the defs in 6. as invalid, but only the subreg use as invalid. Either we must only invalidate the individual subreg for both uses and defs, or the super register for both.
Differential Revision: https://reviews.llvm.org//D157564
Change-Id: I99d5e0b1a0d735e8ea3bd7d137b6464690aa9486
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Revision tags: llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
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#
c59f9ead |
| 26-Jun-2023 |
pvanhout <pierre.vanhoutryve@amd.com> |
[MCP] Optimize copies from undef
Revert D152502 and instead optimize away copy from undefs, but clear the undef flag on the original copy. Apparently, not optimizing the COPY can cause performance i
[MCP] Optimize copies from undef
Revert D152502 and instead optimize away copy from undefs, but clear the undef flag on the original copy. Apparently, not optimizing the COPY can cause performance issues in some cases.
Fixes SWDEV-405813, SWDEV-405899
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D153838
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#
da7892f7 |
| 16-Jun-2023 |
Jay Foad <jay.foad@amd.com> |
[MC] Use regunits instead of MCRegUnitIterator. NFC.
Differential Revision: https://reviews.llvm.org/D153122
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Revision tags: llvmorg-16.0.6, llvmorg-16.0.5 |
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#
aa2d0fbc |
| 21-May-2023 |
Sergei Barannikov <barannikov88@gmail.com> |
[MC] Add MCRegisterInfo::regunits for iteration over register units
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D152098
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#
df1782c2 |
| 09-Jun-2023 |
pvanhout <pierre.vanhoutryve@amd.com> |
[MCP] Do not remove redundant copy for COPY from undef
I don't think we can safely remove the second COPY as redundant in such cases. The first COPY (which has undef src) may be lowered to a KILL in
[MCP] Do not remove redundant copy for COPY from undef
I don't think we can safely remove the second COPY as redundant in such cases. The first COPY (which has undef src) may be lowered to a KILL instruction instead, resulting in no COPY being emitted at all.
Testcase is X86 so it's in the same place as other testcases for this function, but this was initially spotted on AMDGPU with the following: ``` renamable $vgpr24 = PRED_COPY undef renamable $vgpr25, implicit $exec renamable $vgpr24 = PRED_COPY killed renamable $vgpr25, implicit $exec ``` The second COPY waas removed as redundant, and the first one was lowered to a KILL (= removed too), causing $vgpr24 to not have $vgpr25's value.
Fixes SWDEV-401507
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D152502
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Revision tags: llvmorg-16.0.4, llvmorg-16.0.3 |
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#
43b38696 |
| 20-Apr-2023 |
Akshay Khadse <akshayskhadse@gmail.com> |
Fix uninitialized class members
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D148692
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Revision tags: llvmorg-16.0.2 |
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#
8bf7f86d |
| 17-Apr-2023 |
Akshay Khadse <akshayskhadse@gmail.com> |
Fix uninitialized pointer members in CodeGen
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.
Reviewed By: LuoYuanke
Differentia
Fix uninitialized pointer members in CodeGen
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D148303
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