CodeGen: Canonicalize access to function attributes, NFC

Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
=> getF

CodeGen: Canonicalize access to function attributes, NFC

Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
=> getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
=> hasFnAttribute(Kind)

Also, add `Function::getFnStackAlignment()`, and canonicalize:

getAttributes().getStackAlignment(AttributeSet::FunctionIndex)
=> getFnStackAlignment()

llvm-svn: 229208

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remove function names from comments; NFC

llvm-svn: 227256

fix typos; NFC

llvm-svn: 227253

The subtarget is cached on the MachineFunction. Access it directly.

llvm-svn: 227173

Change MCSchedModel to be a struct of statically initialized data.

This removes static initializers from the backends which generate this data, and also makes this struct match the other Tablegen ge

Change MCSchedModel to be a struct of statically initialized data.

This removes static initializers from the backends which generate this data, and also makes this struct match the other Tablegen generated structs in behaviour

Reviewed by Andy Trick and Chandler C

llvm-svn: 216919

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[MachineCombiner] Removal of dangling DBG_VALUES after combining [20598]

This is a cleaner solution to the problem described in r215431.
When instructions are combined a dangling DBG_VALUE is remove

[MachineCombiner] Removal of dangling DBG_VALUES after combining [20598]

This is a cleaner solution to the problem described in r215431.
When instructions are combined a dangling DBG_VALUE is removed.
This resolves bug 20598.

llvm-svn: 215587

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MachineCombiner Pass for selecting faster instruction sequence on AArch64

Re-commit of r214832,r21469 with a work-around that
avoids the previous problem with gcc build compilers

The work-around is

MachineCombiner Pass for selecting faster instruction sequence on AArch64

Re-commit of r214832,r21469 with a work-around that
avoids the previous problem with gcc build compilers

The work-around is to use SmallVector instead of ArrayRef
of basic blocks in preservesResourceLen()/MachineCombiner.cpp

llvm-svn: 215151

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Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781

CodeGen: silence a warning

GCC 4.8.2 objects to the tautological condition in the assert as the unsigned
value is guaranteed to be >= 0. Simplify the assertion by dropping the
tautological conditio

CodeGen: silence a warning

GCC 4.8.2 objects to the tautological condition in the assert as the unsigned
value is guaranteed to be >= 0. Simplify the assertion by dropping the
tautological condition.

llvm-svn: 214671

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MachineCombiner Pass for selecting faster instruction
sequence - target independent framework

When the DAGcombiner selects instruction sequences
it could increase the critical path or resource l

MachineCombiner Pass for selecting faster instruction
sequence - target independent framework

When the DAGcombiner selects instruction sequences
it could increase the critical path or resource len.

For example, on arm64 there are multiply-accumulate instructions (madd,
msub). If e.g. the equivalent multiply-add sequence is not on the
crictial path it makes sense to select it instead of the combined,
single accumulate instruction (madd/msub). The reason is that the
conversion from add+mul to the madd could lengthen the critical path
by the latency of the multiply.

But the DAGCombiner would always combine and select the madd/msub
instruction.

This patch uses machine trace metrics to estimate critical path length
and resource length of an original instruction sequence vs a combined
instruction sequence and picks the faster code based on its estimates.

This patch only commits the target independent framework that evaluates
and selects code sequences. The machine instruction combiner is turned
off for all targets and expected to evolve over time by gradually
handling DAGCombiner pattern in the target specific code.

This framework lays the groundwork for fixing
rdar://16319955

llvm-svn: 214666

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