remove std::ostream versions of printing stuff for MBB and MF,
upgrading a few things to use raw_ostream

llvm-svn: 79811

remove dead PrefixPrinter class.

llvm-svn: 79796

random cleanups.

llvm-svn: 79794

fix another bozo bug

llvm-svn: 79313

fix accidentally inverted conditional and add comment.

llvm-svn: 79312

turn this conditional into something humans might actually
be able to understand ;-)

llvm-svn: 79311

Re-apply LiveInterval index dumping patch, with fixes suggested by Bill
and others.

llvm-svn: 78003

Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.

llvm-svn: 76965

revert r76602, 76603, and r76615, pending design discussions.

llvm-svn: 76646

Add PrefixPrinter arguments to the dump routines for MachineFunction and
MachineBasicBlock. We'll use these shortly.

llvm-svn: 76603

If a MachineBasicBlock has multiple ways of reaching another block,
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work

If a MachineBasicBlock has multiple ways of reaching another block,
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.

llvm-svn: 71018

show more ...

Reapply 68073, with fixes. EH Landing-pad basic blocks are not
entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthroug

Reapply 68073, with fixes. EH Landing-pad basic blocks are not
entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthrough out of line.

llvm-svn: 68129

show more ...

Constify arguments in isSuccessor and isLayoutSuccessor.

llvm-svn: 68054

Delete unnecessary parens around return values.

llvm-svn: 61950

Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006

Add a new MachineBasicBlock utility function, isLayoutSuccessor, that
can be used when deciding if a block can transfer control to another
via a fall-through instead of a branch.

llvm-svn: 56968

Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer

Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189

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Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the asso

Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146

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Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746

Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "E

Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212

show more ...

Added addition atomic instrinsics and, or, xor, min, and max.

llvm-svn: 50663

- Check if a register is livein before removing it. It may have already been removed.
- Do not iterate over SmallPtrSet, the order of iteration is not deterministic.

llvm-svn: 50209

Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.

llvm-svn: 47703

Rename PrintableName to Name.

llvm-svn: 47629

Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625