Revision tags: llvmorg-21-init |
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#
b7eee2c3 |
| 19-Jan-2025 |
Craig Topper <craig.topper@sifive.com> |
[CodeGen] Remove some implict conversions of MCRegister to unsigned by using(). NFC
Many of these are indexing BitVectors or something where we can't using MCRegister and need the register number.
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Revision tags: llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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735ab61a |
| 13-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Remove unused includes (NFC) (#115996)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2 |
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18184045 |
| 09-Oct-2024 |
William G Hatch <william@hatch.uno> |
[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)
This patch handles virtual registers in the VarLocBasedImpl of the
LiveDebugVariables pass, allowing it to be used o
[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX (#111456)
This patch handles virtual registers in the VarLocBasedImpl of the
LiveDebugVariables pass, allowing it to be used on architectures that
depend on virtual registers in debugging, like NVPTX. It enables the
pass for NVPTX.
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Revision tags: llvmorg-19.1.1 |
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22486e03 |
| 21-Sep-2024 |
Kazu Hirata <kazu@google.com> |
[LiveDebugValues] Avoid repeated hash lookups (NFC) (#109509)
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Revision tags: llvmorg-19.1.0, llvmorg-19.1.0-rc4 |
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cd3667d1 |
| 02-Sep-2024 |
Craig Topper <craig.topper@sifive.com> |
[CodeGen] Update a few places that were passing Register to raw_ostream::operator<< (#106877)
These would implicitly cast the register to `unsigned`. Switch most of
them to use printReg will give a
[CodeGen] Update a few places that were passing Register to raw_ostream::operator<< (#106877)
These would implicitly cast the register to `unsigned`. Switch most of
them to use printReg will give a more readable output. Change some
others to use Register::id() so we can eventually remove the implicit
cast to `unsigned`.
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ca53611c |
| 23-Aug-2024 |
Kazu Hirata <kazu@google.com> |
[llvm] Use range-based for loops (NFC) (#105861)
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Revision tags: llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6 |
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1650f1b3 |
| 15-May-2024 |
Jay Foad <jay.foad@amd.com> |
Fix typo "indicies" (#92232)
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Revision tags: llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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7649d223 |
| 14-Dec-2023 |
DianQK <dianqk@dianqk.net> |
[AArch64] ORRWrs is copy instruction when there's no implicit def of the X register (#75184)
Follows
https://github.com/llvm/llvm-project/pull/74682#issuecomment-1850268782.
Fixes #74680.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
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#
f7937939 |
| 02-Oct-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Revert "CodeGen: Disable isCopyInstrImpl if there are implicit operands"
This reverts commit bc7d88faf1a595ab59952a2054418cdd0d9eeee8.
This is broken with 414ff812d6241b728754ce562081419e7fc091eb r
Revert "CodeGen: Disable isCopyInstrImpl if there are implicit operands"
This reverts commit bc7d88faf1a595ab59952a2054418cdd0d9eeee8.
This is broken with 414ff812d6241b728754ce562081419e7fc091eb reverted.
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Revision tags: llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1 |
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bc7d88fa |
| 26-Jul-2023 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
CodeGen: Disable isCopyInstrImpl if there are implicit operands
This is a conservative workaround for broken liveness tracking of SUBREG_TO_REG to speculatively fix all targets. The current reported
CodeGen: Disable isCopyInstrImpl if there are implicit operands
This is a conservative workaround for broken liveness tracking of SUBREG_TO_REG to speculatively fix all targets. The current reported failures are on X86 only, but this issue should appear for all targets that use SUBREG_TO_REG. The next minimally correct refinement would be to disallow only implicit defs.
The coalescer now introduces implicit-defs of the super register to track the dependency on other subregisters. If we see such an implicit operand, we cannot simply treat the subregister def as the result operand in case downstream users depend on the implicitly defined parts. Really target implementations should be considering the implicit defs and trying to interpret them appropriately (maybe with some generic helpers). The full implicit def could possibly be reported as the move result, rather than the subregister def but that requires additional work.
Hopefully fixes #64060 as well.
This needs to be applied to the release branch.
https://reviews.llvm.org/D156346
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Revision tags: llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5 |
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#
5022fc2a |
| 24-May-2023 |
Jay Foad <jay.foad@amd.com> |
[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.
Differential Revision: https://reviews.llvm.org/D151424
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#
fbb241c5 |
| 29-May-2023 |
Wang, Xin10 <xin10.wang@intel.com> |
use ref to avoid copy in range for-loop
Use big obj copy in range for-loop will call copy constructor every time, which can be avoided by use ref instead.
Reviewed By: skan
Differential Revision:
use ref to avoid copy in range for-loop
Use big obj copy in range for-loop will call copy constructor every time, which can be avoided by use ref instead.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D150024
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Revision tags: llvmorg-16.0.4 |
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ae1ca47b |
| 05-May-2023 |
Luo, Yuanke <yuanke.luo@intel.com> |
[Coverity] Big parameter passed by value.
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Revision tags: llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0 |
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a585fa26 |
| 14-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use *{Set,Map}::contains (NFC)
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Revision tags: llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1 |
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#
f753e5be |
| 26-Jan-2023 |
Felipe de Azevedo Piovezan <fpiovezan@apple.com> |
[LiveDebugValues] Allow EntryValue with OP_deref expressions
With D68945, more DBG_VALUEs were created without the indirect operand, instead relying on OP_deref to accomplish the same effect.
At th
[LiveDebugValues] Allow EntryValue with OP_deref expressions
With D68945, more DBG_VALUEs were created without the indirect operand, instead relying on OP_deref to accomplish the same effect.
At the time, however, we were not able to handle arbitrary expressions in combination with OP_LLVM_entry_value, so D71416 prevented the use of such operation in the presence of expressions.
As per the comment in DIExpression::isValid, "we support only entry values of a simple register location." As such, a simple deref operation should be supported. In fact, D80345 added support for indirect DBG_VALUEs.
Taken the patches above into consideration, this commit relaxes the restrictions on which expressions are allowed for entry value candidates: the expression must be either empty or a single dereference operator.
This patch is useful for D141381, which adds support for storing the address of ABI-indirect parameters on the stack.
Depends on D142160
Differential Revision: https://reviews.llvm.org/D142654
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Revision tags: llvmorg-17-init |
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#
e72ca520 |
| 13-Jan-2023 |
Craig Topper <craig.topper@sifive.com> |
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D141715
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Revision tags: llvmorg-15.0.7 |
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#
d198c75e |
| 18-Dec-2022 |
Heejin Ahn <aheejin@gmail.com> |
[WebAssembly][LiveDebugValues] Handle target index defs
This adds the missing handling for defs for target index operands, as is already done for registers.
There are two kinds of target indices: l
[WebAssembly][LiveDebugValues] Handle target index defs
This adds the missing handling for defs for target index operands, as is already done for registers.
There are two kinds of target indices: local indices and stack operands.
- Locals are something similar to registers in Wasm-land. For local indices, we can check for local-defining instructions (`local.set` or `local.tee`).
- Wasm is a stack machine, so we have values in certain Wasm value stack location, which change when Wasm instructions produce or consume values. So basically any value-producing instrucion, i.e., instruction with defs, can change values in the Wasm stack. But I think we don't need to worry about this here, because `WebAssemblyDebugFixup`, which runs right before this analysis, makes sure to insert terminating `DBG_VALUE $noreg` instructions whenever a stack value gets popped. After `WebAssemblyDebugFixup`, there shouldn't be any `DBG_VALUE`s for stack operands that don't have a terminating `DBG_VALUE $noreg` within the same BB.
So this CL only works on `DBG_VALUE`s for locals. When we encounter a `local.set` or `local.tee` instructions, we delete `DBG_VALUE`s for those target index locations from the open range set, so they will not be availble in `OutLocs`. For example, ``` bb.0: successors: %bb.1 DBG_VALUE target-index(wasm-local) + 2, $noreg, "var", ... ... local.set 2 ...
bb.1: ; predecessors: %bb.0 ; We shouldn't add `DBG_VALUE target (wasm-local) + 2 here because ; it was killed by 'local.set' in bb.0 ```
After disabling register coalescing at -O1, the average PC ranges covered for Emscripten core benchmarks is currently 20.6% in the LLVM tot. After applying D138943 and this CL, the coverage goes up to 57%. This also enables LiveDebugValues analysis in the Wasm pipeline by default.
Reviewed By: dschuff, jmorse
Differential Revision: https://reviews.llvm.org/D140373
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
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#
e9ea7a0e |
| 21-Sep-2022 |
Heejin Ahn <aheejin@gmail.com> |
[WebAssembly] Use LiveDebugValues analysis
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at the end of a BB, and this is the analysis extends their lifetime when possible, gr
[WebAssembly] Use LiveDebugValues analysis
This enables `LiveDebugValues` analysis for Wasm. `DBG_VALUE`s expire at the end of a BB, and this is the analysis extends their lifetime when possible, greatly increasing the coverage of variable debug info.
Specifically, this removes the current constraint that this analysis is only used with physical registers, which was first introduced in D18421, because Wasm uses only virtual registers. I don't think there's anything inherent in this analysis that only applies to physical registers; it was just because all targets using this analysis ran this at the end of their compiliation pipeline, at which point all their vregs had been allocated, and Wasm's debug info infrastructure was not really set up yet, so it was not using it.
This adds supports to Wasm-specific target-index operands, defined in https://github.com/llvm/llvm-project/blob/2166d9529a60d1cdedb733d2e4134c971f0969ec/llvm/lib/Target/WebAssembly/WebAssembly.h#L87-L100. Among these, `TI_LOCAL`, `TI_LOCAL_INDIRECT`, and `TI_OPERAND_STACK` are used by Wasm `DBG_VALUE` instructions.
This does not yet handle mutable target indices, i.e., this does not terminate a `DBG_VALUE` for a local index when we encounter a new `local.set` or `local.tee`. It will be implemented as a follow-up.
Reviewed By: dschuff, jmorse
Differential Revision: https://reviews.llvm.org/D138943
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#
4792ba59 |
| 15-Dec-2022 |
Heejin Ahn <aheejin@gmail.com> |
[LiveDebugValues] Remove LexicalScope param from VarLoc (NFC)
It doesn't seem to be used anymore.
Reviewed By: dschuff
Differential Revision: https://reviews.llvm.org/D140258
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#
67819a72 |
| 13-Dec-2022 |
Fangrui Song <i@maskray.me> |
[CodeGen] llvm::Optional => std::optional
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#
0ca43d44 |
| 03-Dec-2022 |
Krzysztof Parzyszek <kparzysz@quicinc.com> |
DebugInfoMetadata: convert Optional to std::optional
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#
998960ee |
| 03-Dec-2022 |
Kazu Hirata <kazu@google.com> |
[CodeGen] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the compiler would warn if None were deprecated. The intent is to reduce the amount of
[CodeGen] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the compiler would warn if None were deprecated. The intent is to reduce the amount of manual work required in migrating from Optional to std::optional.
This is part of an effort to migrate from llvm::Optional to std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
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#
6aa050a6 |
| 08-Nov-2022 |
Nathan James <n.james93@hotmail.co.uk> |
Reland "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 632a389f96355cbe7ed8fa7b8d2ed6267c92457c.
This relands commit 1834a310d060d55748ca38d4ae0482864c2047d8.
Differential R
Reland "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 632a389f96355cbe7ed8fa7b8d2ed6267c92457c.
This relands commit 1834a310d060d55748ca38d4ae0482864c2047d8.
Differential Revision: https://reviews.llvm.org/D137493
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#
632a389f |
| 08-Nov-2022 |
Nathan James <n.james93@hotmail.co.uk> |
Revert "[llvm][NFC] Use c++17 style variable type traits"
This reverts commit 1834a310d060d55748ca38d4ae0482864c2047d8.
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#
1834a310 |
| 08-Nov-2022 |
Nathan James <n.james93@hotmail.co.uk> |
[llvm][NFC] Use c++17 style variable type traits
This was done as a test for D137302 and it makes sense to push these changes
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/
[llvm][NFC] Use c++17 style variable type traits
This was done as a test for D137302 and it makes sense to push these changes
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D137493
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