Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6 |
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fea7b65f |
| 09-Dec-2024 |
Sam Elliott <quic_aelliott@quicinc.com> |
[RISCV] Add Vendor Reloc and Fallback Names (#116974)
The trunk psABI document specifies that `R_RISCV_VENDOR` is 191, and
that relocations 192-255 should be printed as `R_RISCV_CUSTOM<enum val>`
[RISCV] Add Vendor Reloc and Fallback Names (#116974)
The trunk psABI document specifies that `R_RISCV_VENDOR` is 191, and
that relocations 192-255 should be printed as `R_RISCV_CUSTOM<enum val>`
in the absence of better information.
The testcase shows that these parse in `.reloc` directives, and also
print correctly from both the assembler and objdump.
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#
65ced158 |
| 05-Dec-2024 |
Sam Elliott <quic_aelliott@quicinc.com> |
[RISCV] Remove R_RISCV_RVC_LUI Relocation (#118714)
This was removed from the ABI in riscv-non-isa/riscv-elf-psabi-doc#398.
It is not emitted by LLVM, and seems to have been an internal
implementa
[RISCV] Remove R_RISCV_RVC_LUI Relocation (#118714)
This was removed from the ABI in riscv-non-isa/riscv-elf-psabi-doc#398.
It is not emitted by LLVM, and seems to have been an internal
implementation detail in binutils.
This is a follow-up to 26ec5da744b8 which removed previous binutils
internal relocations when they were removed from the ABI.
The LLD implementation was not tested when it was added in
https://reviews.llvm.org/D39322
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init |
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#
03a61d34 |
| 24-Jan-2024 |
Paul Kirth <paulkirth@google.com> |
[RISCV] Support TLSDESC in the RISC-V backend (#66915)
This patch adds basic TLSDESC support in the RISC-V backend.
Specifically, we add new relocation types for TLSDESC, as prescribed in
https
[RISCV] Support TLSDESC in the RISC-V backend (#66915)
This patch adds basic TLSDESC support in the RISC-V backend.
Specifically, we add new relocation types for TLSDESC, as prescribed in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/373, and add a
new pseudo instruction to simplify code generation.
This patch does not try to optimize the local dynamic case, which can be
improved in separate patches.
Linker side changes will also be handled separately.
The current implementation is only enabled when passing the new
`-enable-tlsdesc` codegen flag.
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#
f7678c81 |
| 10-Jan-2024 |
PiJoules <6019989+PiJoules@users.noreply.github.com> |
[llvm][lld] Support R_RISCV_GOT32_PCREL (#72587)
This is the followup implementation to
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/402 that
supports this relocation in llvm and lld.
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Revision tags: llvmorg-17.0.6, llvmorg-17.0.5 |
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#
1df5ea29 |
| 09-Nov-2023 |
Fangrui Song <i@maskray.me> |
[RISCV] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for .uleb128 directives
For a label difference like `.uleb128 A-B`, MC folds A-B even if A and B are separated by a RISC-V linker-relaxable in
[RISCV] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 for .uleb128 directives
For a label difference like `.uleb128 A-B`, MC folds A-B even if A and B are separated by a RISC-V linker-relaxable instruction. This incorrect behavior is currently abused by DWARF v5 .debug_loclists/.debug_rnglists (DW_LLE_offset_pair/DW_RLE_offset_pair entry kinds) implemented in Clang/LLVM (see https://github.com/ClangBuiltLinux/linux/issues/1719 for an instance).
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/96d6e190e9fc04a8517f9ff7fb9aed3e9876cbd6 defined R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128. This patch generates such a pair of relocations to represent A-B that should not be folded. GNU assembler computes the directive size by ignoring shrinkable section content, therefore after linking the value of A-B cannot use more bytes than the reserved number (`final size of uleb128 value at offset ... exceeds available space`). We make the same assumption. ``` w1: call foo w2: .space 120 w3: .uleb128 w2-w1 # 1 byte, 0x08 .uleb128 w3-w1 # 2 bytes, 0x80 0x01 ```
We do not conservatively reserve 10 bytes (maximum size of an uleb128 for uint64_t) as that would pessimize DWARF v5 DW_LLE_offset_pair/DW_RLE_offset_pair, nullifying the benefits of introducing R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 relocations.
The supported expressions are limited. For example,
* non-subtraction `.uleb128 A` is not allowed * `.uleb128 A-B`: report an error unless A and B are both defined and in the same section
The new cl::opt `-riscv-uleb128-reloc` can be used to suppress the relocations.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D157657
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Revision tags: llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
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#
cdb9a0c0 |
| 23-Feb-2023 |
Leonard Chan <leonardchan@google.com> |
[MC][CodeGen] Define R_RISCV_PLT32 and lower dso_local_equivalent to it
This introduces R_RISCV_PLT32, PC-relative data relocation that takes the 32-bit relative offset to a function or its PLT entr
[MC][CodeGen] Define R_RISCV_PLT32 and lower dso_local_equivalent to it
This introduces R_RISCV_PLT32, PC-relative data relocation that takes the 32-bit relative offset to a function or its PLT entry from its relocation location.
This is needed to support relative vtables on RISCV.
Github PR: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/363
The lld handling of this reloc is D143115.
Differential Revision: https://reviews.llvm.org/D143226
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Revision tags: llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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#
26ec5da7 |
| 04-Nov-2021 |
Alex Bradbury <asb@lowrisc.org> |
[RISCV][ELF] Remove internal binutils relocations
These relocations have been removed from the psABI doc in https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/199. This patch simply updates l
[RISCV][ELF] Remove internal binutils relocations
These relocations have been removed from the psABI doc in https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/199. This patch simply updates llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def to match.
Differential Revision: https://reviews.llvm.org/D112999
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2 |
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#
9f854c04 |
| 05-Feb-2020 |
Fangrui Song <maskray@google.com> |
[ELF][RISCV] Add R_RISCV_IRELATIVE
https://github.com/riscv/riscv-elf-psabi-doc/pull/131 assigned 58 to R_RISCV_IRELATIVE.
Differential Revision: https://reviews.llvm.org/D74022
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Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1, llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4, llvmorg-8.0.0-rc3, llvmorg-7.1.0, llvmorg-7.1.0-rc1, llvmorg-8.0.0-rc2, llvmorg-8.0.0-rc1, llvmorg-7.0.1, llvmorg-7.0.1-rc3, llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1, llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1, llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2, llvmorg-6.0.1-rc1, llvmorg-5.0.2, llvmorg-5.0.2-rc2, llvmorg-5.0.2-rc1, llvmorg-6.0.0, llvmorg-6.0.0-rc3, llvmorg-6.0.0-rc2, llvmorg-6.0.0-rc1, llvmorg-5.0.1, llvmorg-5.0.1-rc3, llvmorg-5.0.1-rc2, llvmorg-5.0.1-rc1, llvmorg-5.0.0, llvmorg-5.0.0-rc5, llvmorg-5.0.0-rc4, llvmorg-5.0.0-rc3 |
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#
67820e01 |
| 15-Aug-2017 |
Alex Bradbury <asb@lowrisc.org> |
[RISCV] Recognize new relocation types
This patch adds all RISC-V relocation types, as of binutils 2.29. Note that R_RISCV32_PCREL is not currently documented in the RISC-V ELF PSABI.
Differential
[RISCV] Recognize new relocation types
This patch adds all RISC-V relocation types, as of binutils 2.29. Note that R_RISCV32_PCREL is not currently documented in the RISC-V ELF PSABI.
Differential Revision: https://reviews.llvm.org/D36455
Patch by Chih-Mao Chen (@PkmX)
llvm-svn: 310914
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Revision tags: llvmorg-5.0.0-rc2, llvmorg-5.0.0-rc1, llvmorg-4.0.1, llvmorg-4.0.1-rc3 |
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#
264b5d9e |
| 07-Jun-2017 |
Zachary Turner <zturner@google.com> |
Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of the headers from llvm/Support containing structure and layout definitions for various type
Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of the headers from llvm/Support containing structure and layout definitions for various types of binary formats like dwarf, coff, elf, etc as well as the code for identifying a file from its magic.
Differential Revision: https://reviews.llvm.org/D33843
llvm-svn: 304864
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