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Revision tags: llvmorg-21-init |
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474f5d2a |
| 24-Jan-2025 |
Alexandros Lamprineas <alexandros.lamprineas@arm.com> |
[FMV][AArch64] Remove features predres and ls64. (#124266)
These cannot be detected by reading the ID_AA64ISAR1_EL1 register since
their corresponding bitfields are hidden. Additionally the instruc
[FMV][AArch64] Remove features predres and ls64. (#124266)
These cannot be detected by reading the ID_AA64ISAR1_EL1 register since
their corresponding bitfields are hidden. Additionally the instructions
that these features enable are unusable from EL0.
ACLE: https://github.com/ARM-software/acle/pull/382
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Revision tags: llvmorg-19.1.7 |
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92564850 |
| 13-Jan-2025 |
CarolineConcatto <caroline.concatto@arm.com> |
[Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (#121947)
The 20204-12 ISA update release adds a new feature: FEAT_SSVE_BitPerm,
which allows the sve-bitperm instructions to run in streaming mod
[Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (#121947)
The 20204-12 ISA update release adds a new feature: FEAT_SSVE_BitPerm,
which allows the sve-bitperm instructions to run in streaming mode.
It also removes the requirement of FEAT_SVE2 for FEAT_SVE_BitPerm. The
sve2-bitperm feature is now an alias for sve-bitperm and sve2.
A new feature flag sve-bitperm is added to reflect the change that the
instructions under FEAT_SVE_BitPerm are supported if:
on non streaming mode with FEAT_SVE2 and FEAT_SVE_BitPerm or
in streaming mode with FEAT_SME and FEAT_SSVE_BitPerm
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| #
93011fe2 |
| 07-Jan-2025 |
Alexandros Lamprineas <alexandros.lamprineas@arm.com> |
[FMV][AArch64][clang] Emit fmv-features metadata in LLVM IR. (#118544)
We need to be able to propagate information about FMV attribute strings
from C/C++ source to LLVM IR. This is necessary so tha
[FMV][AArch64][clang] Emit fmv-features metadata in LLVM IR. (#118544)
We need to be able to propagate information about FMV attribute strings
from C/C++ source to LLVM IR. This is necessary so that we can
distinguish which target-features are coming from the cmdline, which are
coming from the target attribute, and which are coming from feature
dependency expansion. We need this for static resolution of calls in
LLVM. Here's a motivating example:
Suppose you have target_version("i8mm+dotprod") and
target_version("fcma"). The first version clearly has higher priority.
Now suppose you specify -march=armv8-a+i8mm on the command line. Then
the versions would have target-features "+i8mm,+dotprod" and
"+i8mm,+fcma" respectively. If you are using those to deduce version
priority, then you would incorrectly deduce that the second version was
higher priority than the first.
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Revision tags: llvmorg-19.1.6 |
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6f013dbc |
| 11-Dec-2024 |
Alexandros Lamprineas <alexandros.lamprineas@arm.com> |
[AArch64][FMV] Add missing feature dependencies and detect at runtime. (#119231)
i8mm -> simd
fp16fml -> simd
frintts -> fp
bf16 -> simd
sme -> fp16
Approved in ACLE as https://github.com/ARM
[AArch64][FMV] Add missing feature dependencies and detect at runtime. (#119231)
i8mm -> simd
fp16fml -> simd
frintts -> fp
bf16 -> simd
sme -> fp16
Approved in ACLE as https://github.com/ARM-software/acle/pull/368
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Revision tags: llvmorg-19.1.5, llvmorg-19.1.4 |
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| #
748b0285 |
| 14-Nov-2024 |
SpencerAbson <Spencer.Abson@arm.com> |
[AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026)
This patch essentially re-lands
https://github.com/llvm/llvm-project/pull/114293 with the following
fixups
- `nosve2-aes` should dis
[AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026)
This patch essentially re-lands
https://github.com/llvm/llvm-project/pull/114293 with the following
fixups
- `nosve2-aes` should disable the backend feature `FeatureSVEAES` such
that the set of existing instructions that this removes is unchanged.
- FMV dependencies now use the autogenerated `ExtensionDepencies`
structure (since https://github.com/llvm/llvm-project/pull/113281) so we
do not require the change to `AArch64FMV.td`.
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| #
461a0d6c |
| 13-Nov-2024 |
Alexandros Lamprineas <alexandros.lamprineas@arm.com> |
[FMV] Add "+fmv" to the target-features of versioned functions. (#116028)
This essentially propagates the information that a function is versioned
from source code to IR.
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| #
207e5ccc |
| 12-Nov-2024 |
Fangrui Song <i@maskray.me> |
[test] Move CodeGen/aarch64-* into the AArch64 subfolder
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...)
`ninja check-clang-codegen-aarch64` can be used to test this subfolder.
P
[test] Move CodeGen/aarch64-* into the AArch64 subfolder
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...)
`ninja check-clang-codegen-aarch64` can be used to test this subfolder.
Pull Request: https://github.com/llvm/llvm-project/pull/115818
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