[Arm][AArch64][Clang] Respect function's branch protection attributes. (#101978)

Default attributes assigned to all functions according to the command
line parameters. Some functions might have the

[Arm][AArch64][Clang] Respect function's branch protection attributes. (#101978)

Default attributes assigned to all functions according to the command
line parameters. Some functions might have their own attributes and we
need to set or remove attributes accordingly.
Tests are updated to test this scenarios too.

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[NFC][Clang] Move set functions out BranchProtectionInfo. (#98451)

To reduce build times move them to TargetCodeGenInfo.

Refactor of #98329

[clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (#68277)

With opaque pointers, `CreatePointerBitCastOrAddrSpaceCast` can be replaced with `CreateAddrSpaceCast`.
Replace or remove

[clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (#68277)

With opaque pointers, `CreatePointerBitCastOrAddrSpaceCast` can be replaced with `CreateAddrSpaceCast`.
Replace or remove uses of `CreatePointerBitCastOrAddrSpaceCast`.

Opaque pointer cleanup effort.

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[clang][CodeGen] Break up TargetInfo.cpp [8/8]

This commit breaks up CodeGen/TargetInfo.cpp into a set of *.cpp files,
one file per target. There are no functional changes, mostly just code moving.

[clang][CodeGen] Break up TargetInfo.cpp [8/8]

This commit breaks up CodeGen/TargetInfo.cpp into a set of *.cpp files,
one file per target. There are no functional changes, mostly just code moving.

Non-code-moving changes are:
* A virtual destructor has been added to DefaultABIInfo to pin the vtable to a cpp file.
* A few methods of ABIInfo and DefaultABIInfo were split into declaration + definition
in order to reduce the number of transitive includes.
* Several functions that used to be static have been placed in clang::CodeGen
namespace so that they can be accessed from other cpp files.

RFC: https://discourse.llvm.org/t/rfc-splitting-clangs-targetinfo-cpp/69883

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148094

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[clang][CodeGen] Break up TargetInfo.cpp [7/8]

Wrap calls to XXXTargetCodeGenInfo constructors into factory functions.
This allows moving implementations of TargetCodeGenInfo to dedicated cpp
files

[clang][CodeGen] Break up TargetInfo.cpp [7/8]

Wrap calls to XXXTargetCodeGenInfo constructors into factory functions.
This allows moving implementations of TargetCodeGenInfo to dedicated cpp
files without a change.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D150215

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[clang] Replace use of Type::getPointerTo() (NFC)

Partial progress towards replacing in-tree uses of `Type::getPointerTo()`.
This needs to be done before deprecating the API.

Reviewed By: nikic, ba

[clang] Replace use of Type::getPointerTo() (NFC)

Partial progress towards replacing in-tree uses of `Type::getPointerTo()`.
This needs to be done before deprecating the API.

Reviewed By: nikic, barannikov88

Differential Revision: https://reviews.llvm.org/D152321

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[MS] Fix passing aligned records by value in some cases

It's not exactly clear what the meaning of TypeInfo::AlignRequirement
is, so go directly to the ASTRecordLayout for records and check the
requ

[MS] Fix passing aligned records by value in some cases

It's not exactly clear what the meaning of TypeInfo::AlignRequirement
is, so go directly to the ASTRecordLayout for records and check the
required alignment there. Compare that number with the stack alignment
value of 4.

This fixes cases when the alignment attribute does not appear directly
on the record [1], or when the attribute on the record is underaligned
[2].

[1]: `struct Foo { int __declspec(align(16)) x; };`
[2]: `struct __declspec(align(1)) Bar { int x; };`

Fixes https://llvm.org/pr63257

Differential Revision: https://reviews.llvm.org/D152752

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[Clang] Remove uses of PointerType::getWithSamePointeeType (NFC)

No longer relevant with opaque pointers.

[clang][CodeGen] Break up TargetInfo.cpp [6/8]

Make `qualifyWindowsLibrary` and `addStackProbeTargetAttributes`
protected members of `TargetCodeGenInfo`.
These are helper functions used by `getDepen

[clang][CodeGen] Break up TargetInfo.cpp [6/8]

Make `qualifyWindowsLibrary` and `addStackProbeTargetAttributes`
protected members of `TargetCodeGenInfo`.
These are helper functions used by `getDependentLibraryOption` and
`setTargetAttributes` methods when targeting Windows. The change will
allow these functions to be reused after splitting `TargetInfo.cpp`.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D150178

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[clang][CodeGen] Break up TargetInfo.cpp [5/8]

Make `occupiesMoreThan` a protected member of `SwiftABIInfo`.
This method is only used by implementations of `SwiftABIInfo`.
Making it protected will a

[clang][CodeGen] Break up TargetInfo.cpp [5/8]

Make `occupiesMoreThan` a protected member of `SwiftABIInfo`.
This method is only used by implementations of `SwiftABIInfo`.
Making it protected will allow to use it after the implementations
are moved to dedicated cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148093

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[clang][CodeGen] Break up TargetInfo.cpp [4/8]

Remove `getABIInfo` overrides returning references to target-specific
implementations of `ABIInfo`.
The methods may be convenient, but they are only us

[clang][CodeGen] Break up TargetInfo.cpp [4/8]

Remove `getABIInfo` overrides returning references to target-specific
implementations of `ABIInfo`.
The methods may be convenient, but they are only used in one place and
prevent from `ABIInfo` implementations from being put into anonymous
namespaces in different cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148092

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[clang][CodeGen] Break up TargetInfo.cpp [3/8]

Don't derive from `DefaultTargetCodeGenInfo`.
This class is going to stay in `TargetInfo.cpp`, whereas its derivants
are going to be moved to separate

[clang][CodeGen] Break up TargetInfo.cpp [3/8]

Don't derive from `DefaultTargetCodeGenInfo`.
This class is going to stay in `TargetInfo.cpp`, whereas its derivants
are going to be moved to separate translation units. Just derive from
the base `TargetCodeGenInfo` class instead.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148091

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[clang][CodeGen] Break up TargetInfo.cpp [2/8]

Move `ABIKind` enums out of `*ABIInfo` classes to break the dependency
between `getTargetCodeGenInfo` and the classes.
This will allow to move the clas

[clang][CodeGen] Break up TargetInfo.cpp [2/8]

Move `ABIKind` enums out of `*ABIInfo` classes to break the dependency
between `getTargetCodeGenInfo` and the classes.
This will allow to move the classes to different cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148090

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[clang][CodeGen] Break up TargetInfo.cpp [1/8]

`CCState` is a helper class originally used by the x86 implementation
but has since been abused by other implementations.
Remove this dependency by imp

[clang][CodeGen] Break up TargetInfo.cpp [1/8]

`CCState` is a helper class originally used by the x86 implementation
but has since been abused by other implementations.
Remove this dependency by implementing customized versions of the class
for implementations that need such functionality.

Reviewed By: efriedma, MaskRay

Differential Revision: https://reviews.llvm.org/D148089

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Change -fsanitize=function to place two words before the function entry

The current implementation of -fsanitize=function places two words (the prolog
signature and the RTTI proxy) at the function e

Change -fsanitize=function to place two words before the function entry

The current implementation of -fsanitize=function places two words (the prolog
signature and the RTTI proxy) at the function entry, which makes the feature
incompatible with Intel Indirect Branch Tracking (IBT) that needs an ENDBR instruction
at the function entry. To allow the combination, move the two words before the
function entry, similar to -fsanitize=kcfi.

Armv8.5 Branch Target Identification (BTI) has a similar requirement.

Note: for IBT and BTI, whether a function gets a marker instruction at the entry
generally cannot be assumed (it can be disabled by a function attribute or
stronger LTO optimizations).

It is extremely unlikely for two words preceding a function entry to be
inaccessible. One way to achieve this is by ensuring that a function is
aligned at a page boundary and making the preceding page unmapped or
unreadable. This is not reasonable for application or library code.
(Think: the first text section has crt* code not instrumented by
-fsanitize=function.)

We use 0xc105cafe for all targets. .long 0xc105cafe disassembles to invalid
instructions on all architectures I have tested, except Power where it is
`lfs 8, -13570(5)` (Load Floating-Point with a weird offset, unlikely to be used in real code).

---

For the removed function in AsmPrinter.cpp, remove an assert: `mdconst::extract`
already asserts non-nullness.

For compiler-rt/test/ubsan/TestCases/TypeCheck/Function/function.cpp,
when the function doesn't have prolog/epilog (-O1 and above), after moving the two words,
the address of the function equals the address of ret instruction,
so symbolizing the function will additionally get a non-zero column number.
Adjust the test to allow an optional column number.
```
.long 3238382334
.long .L__llvm_rtti_proxy-_Z1fv
_Z1fv: // symbolizing here retrieves the line table entry from the second .loc
.file 0 ...
.loc 0 1 0
.cfi_startproc
.loc 0 2 1 prologue_end
retq
```

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D148665

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Migrate {starts,ends}with_insensitive to {starts,ends}_with_insensitive (NFC)

This patch migrates uses of StringRef::{starts,ends}with_insensitive
to StringRef::{starts,ends}_with_insensitive so tha

Migrate {starts,ends}with_insensitive to {starts,ends}_with_insensitive (NFC)

This patch migrates uses of StringRef::{starts,ends}with_insensitive
to StringRef::{starts,ends}_with_insensitive so that we can use names
similar to those used in std::string_view.

Note that the llvm/ directory has migrated in commit
6c3ea866e93003e16fc55d3b5cedd3bc371d1fde.

I'll post a separate patch to deprecate
StringRef::{starts,ends}with_insensitive.

Differential Revision: https://reviews.llvm.org/D150506

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[clang] Fix emitVoidPtrVAArg for non-zero default alloca address space

Indirect arguments are passed on the stack and so va_arg should use the
default alloca address space, not hard-code 0, for poin

[clang] Fix emitVoidPtrVAArg for non-zero default alloca address space

Indirect arguments are passed on the stack and so va_arg should use the
default alloca address space, not hard-code 0, for pointers to those.
The only in-tree target with a non-zero default alloca address space is
AMDGPU, but that does not support variadic arguments, so we cannot test
this upstream. However, downstream in CHERI LLVM (and Morello LLVM, a
further fork of that) we have targets that do both and so require this
change.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D132247

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Revert "[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h."

This reverts commit ee9cbe3548cded885c6409d6dd8a616b515a06d3.

I've been told this cauess a namespace clash

Revert "[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h."

This reverts commit ee9cbe3548cded885c6409d6dd8a616b515a06d3.

I've been told this cauess a namespace clash in lld.

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[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h.

RISCVTargetParser.h has a dependency on a tablegen generated file.

Using RISCVISAInfo.h instead avoids this dependen

[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h.

RISCVTargetParser.h has a dependency on a tablegen generated file.

Using RISCVISAInfo.h instead avoids this dependency.

We just need this constant somewhere visible to the frontend and
backend and I'm trying to avoid adding a header just for it.

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[RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.

This allows the user to set the size of the scalable vector so they
can be used in structs and as the type of gl

[RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.

This allows the user to set the size of the scalable vector so they
can be used in structs and as the type of global variables. This works
by representing the type as a fixed vector instead of a scalable vector
in IR. Conversions to and from scalable vectors are made where necessary
like function arguments/returns and intrinsics.

This features has been requested here
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/176
I know arm_sve_vector_bits is used by the Eigen library so this
could be used to port Eigen to RVV.

This patch adds a new preprocessor define `__riscv_v_fixed_vlen` that
is set when -mrvv_vector_bits is passed on the command line.

The code is largely based on the AArch64 code. A lot of code was
copy/pasted and then modiied to RVV. There may be some opportunities
for sharing.

This first patch only supports the LMUL=1 types. Additional changes
will be needed to support other LMULs. I have also not supported
mask vectors.

Differential Revision: https://reviews.llvm.org/D145088

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[RISCV] Remove support for attribute interrupt("user").

This was part of the N extension which didn't make it version
1.12 of the privilege specification.

Reviewed By: kito-cheng

Differential Revi

[RISCV] Remove support for attribute interrupt("user").

This was part of the N extension which didn't make it version
1.12 of the privilege specification.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D149314

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[OpenMP][AMDGPU] Refactor setting uniform work group size attribute

Work group size attribute was set in Clang specific class. That's why
we cannot reuse this code in Flang.

If we move setting of t

[OpenMP][AMDGPU] Refactor setting uniform work group size attribute

Work group size attribute was set in Clang specific class. That's why
we cannot reuse this code in Flang.

If we move setting of this attribute to OpenMPIRBuilder, then we can reuse this
code in Flang and Clang. Function createOffloadEntry from OpenMPIRBuilder is
already used by Clang (via OpenMPIRBuilder::createOffloadEntriesAndInfoMetadata
function).

Differential Revision: https://reviews.llvm.org/D148525

Reviewed By: jdoerfert

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[NFC][clang] Fix coverity static analyzer concerns about AUTO_CAUSES_COPY

Reported by Coverity:

AUTO_CAUSES_COPY
Unnecessary object copies can affect performance.

1. [NFC] Fix auto keyword use wit

[NFC][clang] Fix coverity static analyzer concerns about AUTO_CAUSES_COPY

Reported by Coverity:

AUTO_CAUSES_COPY
Unnecessary object copies can affect performance.

1. [NFC] Fix auto keyword use without an & causes the copy of an object of type SimpleRegistryEntry in clang::getAttributePluginInstances()

2. [NFC] Fix auto keyword use without an & causes the copy of an object of type tuple in CheckStmtInlineAttr<clang::NoInlineAttr, 2>(clang::Sema &, clang::Stmt const *, clang::Stmt const *, clang::AttributeCommonInfo const &)

3. [NFC] Fix auto keyword use without an & causes the copy of an object of type QualType in <unnamed>::SystemZTargetCodeGenInfo::isVectorTypeBased(clang::Type const *, bool)

4. [NFC] Fix auto keyword use without an & causes the copy of an object of type Policy in <unnamed>::RISCVIntrinsicManagerImpl::InitIntrinsicList()

5. [NFC] Fix auto keyword use without an & causes the copy of an object of type pair in checkUndefinedButUsed(clang::Sema &)

Reviewed By: tahonermann

Differential Revision: <https://reviews.llvm.org/D147543>

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[clang][PowerPC] Remove remaining Darwin support

POWER Darwin support in the backend has been removed for some time: https://discourse.llvm.org/t/rfc-remove-darwin-support-from-power-backends
but Cl

[clang][PowerPC] Remove remaining Darwin support

POWER Darwin support in the backend has been removed for some time: https://discourse.llvm.org/t/rfc-remove-darwin-support-from-power-backends
but Clang still has the TargetInfo and other remnants lying around.

This patch does some cleanup and removes those and other related frontend support still remaining. We adjust any tests using the triple to either remove
the test if unneeded or switch to another Power triple.

Reviewed By: MaskRay, nemanjai

Differential Revision: https://reviews.llvm.org/D146459

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[Clang][DebugInfo][AMDGPU] Emit zero size bitfields in the debug info to delimit bitfields in different allocation units.

Consider the following sturctures when targetting:

struct foo {
int s

[Clang][DebugInfo][AMDGPU] Emit zero size bitfields in the debug info to delimit bitfields in different allocation units.

Consider the following sturctures when targetting:

struct foo {
int space[4];
char a : 8;
char b : 8;
char x : 8;
char y : 8;
};

struct bar {
int space[4];
char a : 8;
char b : 8;
char : 0;
char x : 8;
char y : 8;
};

Even if both structs have the same layout in memory, they are handled
differenlty by the AMDGPU ABI.

With the following code:

// clang --target=amdgcn-amd-amdhsa -g -O1 example.c -S
char use_foo(struct foo f) { return f.y; }
char use_bar(struct bar b) { return b.y; }

For use_foo, the 'y' field is passed in v4
; v_ashrrev_i32_e32 v0, 24, v4
; s_setpc_b64 s[30:31]

For use_bar, the 'y' field is passed in v5
; v_bfe_i32 v0, v5, 8, 8
; s_setpc_b64 s[30:31]

To make this distinction, we record a single 0-size bitfield for every member that is preceded
by it.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D144870

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