tools - OpenGrok history log for /isa-l/tools

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00d6e6fe	19-Nov-2024	Cornu, Marcel D <marcel.d.cornu@intel.com>	add perf target to windows makefile Signed-off-by: Cornu, Marcel D <marcel.d.cornu@intel.com> /isa-l/Makefile.nmake gen_nmake.mk
496255cd	01-May-2024	Marcel Cornu <marcel.d.cornu@intel.com>	tools: format source files in parallel Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> /isa-l/.clang-format-ignore /isa-l/.github/workflows/ci.yml /isa-l/crc/aarch64/crc64_rocksoft.c /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/crc16_t10dif_copy_perf.c /isa-l/crc/crc16_t10dif_copy_test.c /isa-l/crc/crc16_t10dif_op_perf.c /isa-l/crc/crc16_t10dif_perf.c /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc32_gzip_refl_perf.c /isa-l/crc/crc32_ieee_perf.c /isa-l/crc/crc32_iscsi_perf.c /isa-l/crc/crc64_base.c /isa-l/crc/crc64_example.c /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_funcs_test.c /isa-l/crc/crc64_ref.h /isa-l/crc/crc_base.c /isa-l/crc/crc_base_aliases.c /isa-l/crc/crc_ref.h /isa-l/crc/crc_simple_test.c /isa-l/erasure_code/aarch64/ec_aarch64_dispatcher.c /isa-l/erasure_code/aarch64/ec_aarch64_highlevel_func.c /isa-l/erasure_code/ec_base.c /isa-l/erasure_code/ec_base.h /isa-l/erasure_code/ec_base_aliases.c /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/erasure_code_base_perf.c /isa-l/erasure_code/erasure_code_base_test.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/erasure_code_test.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/erasure_code_update_test.c /isa-l/erasure_code/gen_rs_matrix_limits.c /isa-l/erasure_code/gf_inverse_test.c /isa-l/erasure_code/gf_vect_dot_prod_1tbl.c /isa-l/erasure_code/gf_vect_dot_prod_base_test.c /isa-l/erasure_code/gf_vect_dot_prod_perf.c /isa-l/erasure_code/gf_vect_dot_prod_test.c /isa-l/erasure_code/gf_vect_mad_test.c /isa-l/erasure_code/gf_vect_mul_base_test.c /isa-l/erasure_code/gf_vect_mul_perf.c /isa-l/erasure_code/gf_vect_mul_test.c /isa-l/erasure_code/ppc64le/ec_base_vsx.c /isa-l/erasure_code/ppc64le/ec_base_vsx.h /isa-l/erasure_code/ppc64le/gf_2vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_2vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_3vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_3vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_4vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_4vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_5vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_5vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_6vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_6vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_mul_vsx.c /isa-l/examples/crc/crc_combine_example.c /isa-l/examples/ec/ec_piggyback_example.c /isa-l/examples/ec/ec_simple_example.c /isa-l/igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c /isa-l/igzip/adler32_base.c /isa-l/igzip/adler32_perf.c /isa-l/igzip/bitbuf2.h /isa-l/igzip/checksum32_funcs_test.c /isa-l/igzip/checksum_test_ref.h /isa-l/igzip/encode_df.c /isa-l/igzip/encode_df.h /isa-l/igzip/flatten_ll.c /isa-l/igzip/flatten_ll.h /isa-l/igzip/generate_custom_hufftables.c /isa-l/igzip/generate_static_inflate.c /isa-l/igzip/huff_codes.c /isa-l/igzip/huff_codes.h /isa-l/igzip/huffman.h /isa-l/igzip/hufftables_c.c /isa-l/igzip/igzip.c /isa-l/igzip/igzip_base.c /isa-l/igzip/igzip_base_aliases.c /isa-l/igzip/igzip_build_hash_table_perf.c /isa-l/igzip/igzip_checksums.h /isa-l/igzip/igzip_example.c /isa-l/igzip/igzip_file_perf.c /isa-l/igzip/igzip_hist_perf.c /isa-l/igzip/igzip_icf_base.c /isa-l/igzip/igzip_icf_body.c /isa-l/igzip/igzip_inflate.c /isa-l/igzip/igzip_inflate_test.c /isa-l/igzip/igzip_level_buf_structs.h /isa-l/igzip/igzip_perf.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/igzip_semi_dyn_file_perf.c /isa-l/igzip/igzip_sync_flush_example.c /isa-l/igzip/igzip_wrapper.h /isa-l/igzip/igzip_wrapper_hdr_test.c /isa-l/igzip/inflate_std_vects.h /isa-l/igzip/proc_heap_base.c /isa-l/igzip/repeated_char_result.h /isa-l/igzip/static_inflate.h /isa-l/include/aarch64_multibinary.h /isa-l/include/crc.h /isa-l/include/crc64.h /isa-l/include/erasure_code.h /isa-l/include/gf_vect_mul.h /isa-l/include/igzip_lib.h /isa-l/include/mem_routines.h /isa-l/include/raid.h /isa-l/include/test.h /isa-l/include/unaligned.h /isa-l/make.inc /isa-l/mem/aarch64/mem_aarch64_dispatcher.c /isa-l/mem/mem_zero_detect_base.c /isa-l/mem/mem_zero_detect_base_aliases.c /isa-l/mem/mem_zero_detect_perf.c /isa-l/mem/mem_zero_detect_test.c /isa-l/programs/Makefile.am /isa-l/programs/igzip_cli.c /isa-l/raid/aarch64/raid_aarch64_dispatcher.c /isa-l/raid/pq_check_test.c /isa-l/raid/pq_gen_perf.c /isa-l/raid/pq_gen_test.c /isa-l/raid/raid_base.c /isa-l/raid/raid_base_aliases.c /isa-l/raid/xor_check_test.c /isa-l/raid/xor_example.c /isa-l/raid/xor_gen_perf.c /isa-l/raid/xor_gen_test.c /isa-l/tests/fuzz/igzip_checked_inflate_fuzz_test.c /isa-l/tests/fuzz/igzip_dump_inflate_corpus.c /isa-l/tests/fuzz/igzip_fuzz_inflate.c /isa-l/tests/fuzz/igzip_simple_inflate_fuzz_test.c /isa-l/tests/fuzz/igzip_simple_round_trip_fuzz_test.c format.sh
07bca509	19-Apr-2024	Marcel Cornu <marcel.d.cornu@intel.com>	tools: use clang-format for style checking Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> /isa-l/.clang-format /isa-l/.clang-format-ignore /isa-l/.github/workflows/ci.yml /isa-l/CONTRIBUTING.md /isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S /isa-l/igzip/aarch64/igzip_decode_huffman_code_block_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_body_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_finish_aarch64.S /isa-l/igzip/aarch64/isal_deflate_icf_body_hash_hist.S /isa-l/igzip/aarch64/isal_deflate_icf_finish_hash_hist.S check_format.sh format.sh
4b74fb22	03-Mar-2024	Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>	tools: replace echo -n with printf Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp> /isa-l/README.md /isa-l/make.inc gen_nmake.mk
37005a00	09-Mar-2024	orbea <orbea@riseup.net>	tools: fix shebang This causes a build failure with slibtool. Gentoo issue: https://bugs.gentoo.org/829500 Signed-off-by: orbea <orbea@riseup.net> /isa-l/.github/workflows/ci.yml /isa-l/LICENSE /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/README.md /isa-l/Release_notes.txt /isa-l/configure.ac /isa-l/crc/aarch64/crc16_t10dif_copy_pmull.S /isa-l/crc/aarch64/crc16_t10dif_pmull.S /isa-l/crc/crc16_t10dif_copy_test.c /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc32_iscsi_01.asm /isa-l/crc/crc64_example.c /isa-l/crc/crc64_funcs_test.c /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/aarch64/ec_aarch64_dispatcher.c /isa-l/erasure_code/aarch64/ec_multibinary_arm.S /isa-l/erasure_code/aarch64/gf_vect_mul_sve.S /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/erasure_code_base_perf.c /isa-l/erasure_code/erasure_code_base_test.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/erasure_code_test.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/erasure_code_update_test.c /isa-l/erasure_code/gen_rs_matrix_limits.c /isa-l/erasure_code/gf_2vect_dot_prod_avx2_gfni.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_2vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_2vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx2_gfni.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_3vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_3vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_4vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_4vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_5vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_5vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_6vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_inverse_test.c /isa-l/erasure_code/gf_vect_dot_prod_avx2_gfni.asm /isa-l/erasure_code/gf_vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_vect_dot_prod_base_test.c /isa-l/erasure_code/gf_vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_vect_mul_avx.asm /isa-l/erasure_code/gf_vect_mul_sse.asm /isa-l/erasure_code/gf_vect_mul_test.c /isa-l/erasure_code/ppc64le/ec_base_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_mul_vsx.c /isa-l/examples/ec/ec_piggyback_example.c /isa-l/igzip/aarch64/igzip_isal_adler32_neon.S /isa-l/igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c /isa-l/igzip/aarch64/isal_deflate_icf_body_hash_hist.S /isa-l/igzip/adler32_avx2_4.asm /isa-l/igzip/adler32_sse.asm /isa-l/igzip/checksum32_funcs_test.c /isa-l/igzip/generate_custom_hufftables.c /isa-l/igzip/huff_codes.c /isa-l/igzip/huff_codes.h /isa-l/igzip/huffman.h /isa-l/igzip/igzip.c /isa-l/igzip/igzip_body.asm /isa-l/igzip/igzip_build_hash_table_perf.c /isa-l/igzip/igzip_decode_block_stateless.asm /isa-l/igzip/igzip_file_perf.c /isa-l/igzip/igzip_icf_body_h1_gr_bt.asm /isa-l/igzip/igzip_inflate.c /isa-l/igzip/igzip_inflate_test.c /isa-l/igzip/igzip_perf.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/igzip_wrapper_hdr_test.c /isa-l/igzip/repeated_char_result.h /isa-l/include/igzip_lib.h /isa-l/include/multibinary.asm /isa-l/include/test.h /isa-l/isa-l.def /isa-l/make.inc /isa-l/mem/mem_zero_detect_test.c /isa-l/programs/igzip.1 /isa-l/programs/igzip_cli.c /isa-l/programs/igzip_cli_check.sh /isa-l/raid/pq_check_test.c /isa-l/raid/pq_gen_test.c /isa-l/raid/xor_check_sse.asm /isa-l/raid/xor_check_test.c /isa-l/raid/xor_example.c /isa-l/raid/xor_gen_test.c /isa-l/tests/fuzz/igzip_checked_inflate_fuzz_test.c nasm-filter.sh yasm-filter.sh
f8274649	11-Dec-2023	Pablo de Lara <pablo.de.lara.guarch@intel.com>	tools: check code style first Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> /isa-l/Makefile.nmake /isa-l/autogen.sh /isa-l/configure.ac /isa-l/crc/crc16_t10dif_op_perf.c /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_funcs_test.c /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/gf_3vect_dot_prod_avx2_gfni.asm /isa-l/igzip/igzip_inflate.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/igzip_wrapper_hdr_test.c /isa-l/raid/pq_check_sse.asm /isa-l/raid/xor_check_sse.asm test_autorun.sh
df073be3	30-Nov-2023	Pablo de Lara <pablo.de.lara.guarch@intel.com>	tools: allow testing on multiple architectures with Intel SDE Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> /isa-l/Makefile.nmake /isa-l/crc/crc16_t10dif_copy_test.c /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc64_funcs_test.c /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/ec_base.c /isa-l/erasure_code/ec_base.h /isa-l/erasure_code/ec_base_aliases.c /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/ec_multibinary.asm /isa-l/erasure_code/erasure_code_base_perf.c /isa-l/erasure_code/erasure_code_base_test.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/erasure_code_test.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/erasure_code_update_test.c /isa-l/erasure_code/gf_2vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_2vect_mad_avx512.asm /isa-l/erasure_code/gf_2vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_3vect_mad_avx512.asm /isa-l/erasure_code/gf_3vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_4vect_mad_avx512.asm /isa-l/erasure_code/gf_4vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_5vect_mad_avx512.asm /isa-l/erasure_code/gf_5vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_6vect_mad_avx512.asm /isa-l/erasure_code/gf_6vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_inverse_test.c /isa-l/erasure_code/gf_vect_dot_prod_avx2_gfni.asm /isa-l/erasure_code/gf_vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_vect_dot_prod_avx512_gfni.asm /isa-l/erasure_code/gf_vect_dot_prod_base_test.c /isa-l/erasure_code/gf_vect_dot_prod_test.c /isa-l/erasure_code/gf_vect_gfni.inc /isa-l/erasure_code/gf_vect_mad_avx2_gfni.asm /isa-l/erasure_code/gf_vect_mad_avx512.asm /isa-l/erasure_code/gf_vect_mad_avx512_gfni.asm /isa-l/erasure_code/gf_vect_mad_test.c /isa-l/erasure_code/gf_vect_mul_base_test.c /isa-l/erasure_code/gf_vect_mul_test.c /isa-l/igzip/checksum32_funcs_test.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/igzip_wrapper_hdr_test.c /isa-l/include/erasure_code.h /isa-l/include/memcpy.asm /isa-l/include/multibinary.asm /isa-l/include/reg_sizes.asm /isa-l/isa-l.def /isa-l/mem/mem_zero_detect_test.c /isa-l/raid/pq_check_test.c /isa-l/raid/pq_gen_test.c /isa-l/raid/xor_check_test.c /isa-l/raid/xor_gen_test.c test_autorun.sh test_extended.sh
34463cb6	16-Nov-2023	Pablo de Lara <pablo.de.lara.guarch@intel.com>	ci: build with EC_ALIGNED_ADDR and NO_NT_LDST Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> /isa-l/.github/workflows/ci.yml /isa-l/Makefile.nmake /isa-l/README.md /isa-l/crc/Makefile.am /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc16_t10dif_copy_pmull.S /isa-l/crc/aarch64/crc16_t10dif_pmull.S /isa-l/crc/aarch64/crc32_aarch64_common.h /isa-l/crc/aarch64/crc32_common_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32_gzip_refl_3crc_fold.S /isa-l/crc/aarch64/crc32_gzip_refl_crc_ext.S /isa-l/crc/aarch64/crc32_gzip_refl_pmull.S /isa-l/crc/aarch64/crc32_gzip_refl_pmull.h /isa-l/crc/aarch64/crc32_ieee_norm_pmull.S /isa-l/crc/aarch64/crc32_ieee_norm_pmull.h /isa-l/crc/aarch64/crc32_iscsi_3crc_fold.S /isa-l/crc/aarch64/crc32_iscsi_crc_ext.S /isa-l/crc/aarch64/crc32_iscsi_refl_pmull.S /isa-l/crc/aarch64/crc32_iscsi_refl_pmull.h /isa-l/crc/aarch64/crc32_mix_default.S /isa-l/crc/aarch64/crc32_mix_default_common.S /isa-l/crc/aarch64/crc32_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32_norm_common_pmull.h /isa-l/crc/aarch64/crc32_refl_common_pmull.h /isa-l/crc/aarch64/crc32c_mix_default.S /isa-l/crc/aarch64/crc32c_mix_neoverse_n1.S /isa-l/crc/aarch64/crc64_ecma_norm_pmull.S /isa-l/crc/aarch64/crc64_ecma_norm_pmull.h /isa-l/crc/aarch64/crc64_ecma_refl_pmull.S /isa-l/crc/aarch64/crc64_ecma_refl_pmull.h /isa-l/crc/aarch64/crc64_iso_norm_pmull.S /isa-l/crc/aarch64/crc64_iso_norm_pmull.h /isa-l/crc/aarch64/crc64_iso_refl_pmull.S /isa-l/crc/aarch64/crc64_iso_refl_pmull.h /isa-l/crc/aarch64/crc64_jones_norm_pmull.S /isa-l/crc/aarch64/crc64_jones_norm_pmull.h /isa-l/crc/aarch64/crc64_jones_refl_pmull.S /isa-l/crc/aarch64/crc64_jones_refl_pmull.h /isa-l/crc/aarch64/crc64_norm_common_pmull.h /isa-l/crc/aarch64/crc64_refl_common_pmull.h /isa-l/crc/aarch64/crc64_rocksoft.c /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/aarch64/crc_common_pmull.h /isa-l/crc/crc16_t10dif_by16_10.asm /isa-l/crc/crc32_gzip_refl_by16_10.asm /isa-l/crc/crc32_ieee_by16_10.asm /isa-l/crc/crc32_iscsi_by16_10.asm /isa-l/crc/crc64_base.c /isa-l/crc/crc64_ecma_norm_by8.asm /isa-l/crc/crc64_ecma_refl_by8.asm /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_funcs_test.c /isa-l/crc/crc64_iso_norm_by16_10.asm /isa-l/crc/crc64_iso_norm_by8.asm /isa-l/crc/crc64_iso_refl_by16_10.asm /isa-l/crc/crc64_iso_refl_by8.asm /isa-l/crc/crc64_jones_norm_by8.asm /isa-l/crc/crc64_jones_refl_by8.asm /isa-l/crc/crc64_multibinary.asm /isa-l/crc/crc64_ref.h /isa-l/crc/crc64_rocksoft_norm_by16_10.asm /isa-l/crc/crc64_rocksoft_norm_by8.asm /isa-l/crc/crc64_rocksoft_refl_by16_10.asm /isa-l/crc/crc64_rocksoft_refl_by8.asm /isa-l/crc/crc_base_aliases.c /isa-l/doc/functions.md /isa-l/erasure_code/aarch64/ec_aarch64_dispatcher.c /isa-l/erasure_code/aarch64/gf_2vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_2vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_2vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_3vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_3vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_3vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_4vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_4vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_4vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_5vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_5vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_5vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_6vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_6vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_7vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_8vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_vect_mul_neon.S /isa-l/erasure_code/aarch64/gf_vect_mul_sve.S /isa-l/erasure_code/ec_base.c /isa-l/erasure_code/ec_base_aliases.c /isa-l/erasure_code/gf_vect_mul_base_test.c /isa-l/erasure_code/gf_vect_mul_test.c /isa-l/erasure_code/ppc64le/gf_vect_mul_vsx.c /isa-l/examples/crc/Makefile /isa-l/examples/crc/crc_combine_example.c /isa-l/igzip/aarch64/encode_df.S /isa-l/igzip/aarch64/gen_icf_map.S /isa-l/igzip/aarch64/igzip_decode_huffman_code_block_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_body_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_finish_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_hash_aarch64.S /isa-l/igzip/aarch64/igzip_isal_adler32_neon.S /isa-l/igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c /isa-l/igzip/aarch64/igzip_set_long_icf_fg.S /isa-l/igzip/aarch64/isal_deflate_icf_body_hash_hist.S /isa-l/igzip/aarch64/isal_deflate_icf_finish_hash_hist.S /isa-l/igzip/aarch64/isal_update_histogram.S /isa-l/igzip/igzip.c /isa-l/igzip/igzip_inflate.c /isa-l/include/aarch64_label.h /isa-l/include/aarch64_multibinary.h /isa-l/include/crc64.h /isa-l/include/gf_vect_mul.h /isa-l/isa-l.def /isa-l/mem/aarch64/mem_aarch64_dispatcher.c /isa-l/mem/aarch64/mem_zero_detect_neon.S /isa-l/raid/aarch64/pq_check_neon.S /isa-l/raid/aarch64/pq_gen_neon.S /isa-l/raid/aarch64/raid_aarch64_dispatcher.c /isa-l/raid/aarch64/xor_check_neon.S /isa-l/raid/aarch64/xor_gen_neon.S test_extended.sh
b6e96427	11-Oct-2022	Pawel Piatek <pawelx.piatek@intel.com>	Use gindent on FreeBSD Also add workaround for GNU indent bug. Signed-off-by: Pawel Piatek <pawelx.piatek@intel.com> Change-Id: I9478a06dc17675c858030cfe15552609fef021da /isa-l/Doxyfile /isa-l/README.md /isa-l/SECURITY.md /isa-l/crc/crc16_t10dif_01.asm /isa-l/crc/crc16_t10dif_by4.asm /isa-l/crc/crc16_t10dif_copy_by4.asm /isa-l/crc/crc16_t10dif_copy_perf.c /isa-l/crc/crc16_t10dif_op_perf.c /isa-l/crc/crc16_t10dif_perf.c /isa-l/crc/crc32_gzip_refl_by8.asm /isa-l/crc/crc32_gzip_refl_perf.c /isa-l/crc/crc32_ieee_01.asm /isa-l/crc/crc32_ieee_by4.asm /isa-l/crc/crc32_ieee_perf.c /isa-l/crc/crc32_iscsi_00.asm /isa-l/crc/crc32_iscsi_01.asm /isa-l/crc/crc32_iscsi_perf.c /isa-l/crc/crc64_base.c /isa-l/crc/crc64_ecma_norm_by8.asm /isa-l/crc/crc64_ecma_refl_by8.asm /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_iso_norm_by8.asm /isa-l/crc/crc64_iso_refl_by8.asm /isa-l/crc/crc64_jones_norm_by8.asm /isa-l/crc/crc64_jones_refl_by8.asm /isa-l/crc/crc64_multibinary.asm /isa-l/crc/crc_base.c /isa-l/crc/crc_multibinary.asm /isa-l/erasure_code/ec_base.c /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/ec_multibinary.asm /isa-l/erasure_code/erasure_code_base_perf.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/gf_2vect_dot_prod_avx.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_2vect_dot_prod_sse.asm /isa-l/erasure_code/gf_2vect_mad_avx.asm /isa-l/erasure_code/gf_2vect_mad_avx2.asm /isa-l/erasure_code/gf_2vect_mad_sse.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_3vect_dot_prod_sse.asm /isa-l/erasure_code/gf_3vect_mad_avx.asm /isa-l/erasure_code/gf_3vect_mad_avx2.asm /isa-l/erasure_code/gf_3vect_mad_sse.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_4vect_dot_prod_sse.asm /isa-l/erasure_code/gf_4vect_mad_avx.asm /isa-l/erasure_code/gf_4vect_mad_avx2.asm /isa-l/erasure_code/gf_4vect_mad_sse.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_5vect_dot_prod_sse.asm /isa-l/erasure_code/gf_5vect_mad_avx.asm /isa-l/erasure_code/gf_5vect_mad_avx2.asm /isa-l/erasure_code/gf_5vect_mad_sse.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_6vect_dot_prod_sse.asm /isa-l/erasure_code/gf_6vect_mad_avx.asm /isa-l/erasure_code/gf_6vect_mad_avx2.asm /isa-l/erasure_code/gf_6vect_mad_sse.asm /isa-l/erasure_code/gf_vect_dot_prod_1tbl.c /isa-l/erasure_code/gf_vect_dot_prod_avx.asm /isa-l/erasure_code/gf_vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_vect_dot_prod_perf.c /isa-l/erasure_code/gf_vect_dot_prod_sse.asm /isa-l/erasure_code/gf_vect_mad_avx.asm /isa-l/erasure_code/gf_vect_mad_avx2.asm /isa-l/erasure_code/gf_vect_mad_sse.asm /isa-l/erasure_code/gf_vect_mul_avx.asm /isa-l/erasure_code/gf_vect_mul_perf.c /isa-l/erasure_code/gf_vect_mul_sse.asm /isa-l/igzip/adler32_perf.c /isa-l/igzip/huff_codes.c /isa-l/igzip/igzip.c /isa-l/igzip/igzip_inflate.c /isa-l/include/reg_sizes.asm /isa-l/raid/pq_check_sse.asm /isa-l/raid/pq_check_sse_i32.asm /isa-l/raid/pq_gen_avx.asm /isa-l/raid/pq_gen_avx2.asm /isa-l/raid/pq_gen_perf.c /isa-l/raid/pq_gen_sse.asm /isa-l/raid/pq_gen_sse_i32.asm /isa-l/raid/raid_base.c /isa-l/raid/raid_multibinary.asm /isa-l/raid/xor_check_sse.asm /isa-l/raid/xor_gen_avx.asm /isa-l/raid/xor_gen_perf.c /isa-l/raid/xor_gen_sse.asm check_format.sh
62519d97	11-Jul-2022	Greg Tucker <greg.b.tucker@intel.com>	build: Remove ms link flag for msvcrt The cflag to link with dynamic msvcrt /MD is not necessary and causes warnings when static linking. Fixes #219 Change-Id: I0085d468afc4acbe323b0783cbbc6760b4c build: Remove ms link flag for msvcrt The cflag to link with dynamic msvcrt /MD is not necessary and causes warnings when static linking. Fixes #219 Change-Id: I0085d468afc4acbe323b0783cbbc6760b4c70704 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/Doxyfile /isa-l/Makefile.nmake /isa-l/crc/aarch64/crc16_t10dif_copy_pmull.S /isa-l/crc/aarch64/crc16_t10dif_pmull.S /isa-l/doc/functions.md /isa-l/igzip/aarch64/igzip_isal_adler32_neon.S /isa-l/igzip/igzip_icf_body.c gen_nmake.mk
57846f41	20-Jan-2022	H.J. Lu <hjl.tools@gmail.com>	Properly add .note.gnu.property section to assembly codes 1. Revert "x86: Generate .note.gnu.property section for ELF output" This reverts commit 8074e3fe1b9398a9d3b717267790050fc5041594, which is Properly add .note.gnu.property section to assembly codes 1. Revert "x86: Generate .note.gnu.property section for ELF output" This reverts commit 8074e3fe1b9398a9d3b717267790050fc5041594, which is a hack to work around the old nasm which doesn't support section .note.gnu.property note alloc noexec align=8 This hack doesn't work for downstream, like: https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=2040091 2. If Intel CET is enabled, require nasm with note section support to add section .note.gnu.property note alloc noexec align=N to assembly codes. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 on Tiger Lake. Change-Id: I6d66fe6fd054420d7fde35b1508ca9f09defdeca Signed-off-by: H.J. Lu <hjl.tools@gmail.com> show more ... /isa-l/.github/workflows/ci.yml /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/README.md /isa-l/configure.ac /isa-l/erasure_code/aarch64/Makefile.am /isa-l/erasure_code/aarch64/ec_aarch64_dispatcher.c /isa-l/erasure_code/aarch64/ec_aarch64_highlevel_func.c /isa-l/erasure_code/aarch64/gf_2vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_2vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_3vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_3vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_4vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_4vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_5vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_5vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_6vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_6vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_7vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_8vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_vect_dot_prod_sve.S /isa-l/erasure_code/aarch64/gf_vect_mad_sve.S /isa-l/erasure_code/aarch64/gf_vect_mul_sve.S /isa-l/erasure_code/ec_base.c /isa-l/igzip/bitbuf2.h /isa-l/igzip/encode_df.h /isa-l/igzip/generate_custom_hufftables.c /isa-l/igzip/huff_codes.c /isa-l/igzip/huff_codes.h /isa-l/igzip/huffman.h /isa-l/igzip/igzip.c /isa-l/igzip/igzip_base.c /isa-l/igzip/igzip_icf_base.c /isa-l/igzip/igzip_icf_body.c /isa-l/igzip/igzip_inflate.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/proc_heap_base.c /isa-l/include/reg_sizes.asm /isa-l/include/unaligned.h /isa-l/mem/Makefile.am /isa-l/mem/mem_multibinary.asm /isa-l/mem/mem_zero_detect_avx512.asm /isa-l/mem/mem_zero_detect_base.c /isa-l/tests/fuzz/igzip_simple_round_trip_fuzz_test.c
fd83ed19	12-Oct-2021	Ruben Vorderman <r.h.p.vorderman@lumc.nl>	Add -arch to unsupported arguments in [ny]asm-filters Change-Id: Ieb53bb225815e204482e74bb383f1b61f12dabfd Signed-off-by: Ruben Vorderman <r.h.p.vorderman@lumc.nl> /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/make.inc /isa-l/mem/Makefile.am /isa-l/mem/mem_multibinary.asm /isa-l/mem/mem_zero_detect_avx2.asm /isa-l/mem/mem_zero_detect_test.c nasm-cet-filter.sh nasm-filter.sh yasm-cet-filter.sh yasm-filter.sh
998e03bf	10-Sep-2021	Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>	Strip -isysroot and related flags from asm-filter This helps python-isal compatibility. Change-Id: I8a2540e330f229f65903bdb2cc47aceeb0724dc5 Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp> nasm-cet-filter.sh nasm-filter.sh yasm-cet-filter.sh yasm-filter.sh
066940a9	03-Sep-2021	Greg Tucker <greg.b.tucker@intel.com>	build: Add ms rc file to put extra metatdata on dll Change-Id: Idf687c6b2f8d1dea203f01bf57c5158d19ed519e Signed-off-by: Ranjit Menon <ranjit.menon@intel.com> Signed-off-by: Greg Tucker <greg.b.tucke build: Add ms rc file to put extra metatdata on dll Change-Id: Idf687c6b2f8d1dea203f01bf57c5158d19ed519e Signed-off-by: Ranjit Menon <ranjit.menon@intel.com> Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/Doxyfile /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/README.md /isa-l/crc/Makefile.am /isa-l/crc/crc16_t10dif_copy_perf.c /isa-l/crc/crc16_t10dif_perf.c /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc32_gzip_refl_perf.c /isa-l/crc/crc32_ieee_perf.c /isa-l/crc/crc32_iscsi_perf.c /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_funcs_test.c /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/erasure_code_base_test.c /isa-l/erasure_code/erasure_code_test.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/erasure_code_update_test.c /isa-l/erasure_code/gf_vect_dot_prod_base_test.c /isa-l/erasure_code/gf_vect_dot_prod_test.c /isa-l/erasure_code/gf_vect_mad_test.c /isa-l/igzip/checksum32_funcs_test.c /isa-l/igzip/igzip.c /isa-l/igzip/igzip_perf.c /isa-l/include/test.h /isa-l/isa-l.rc /isa-l/make.inc /isa-l/mem/Makefile.am /isa-l/mem/mem_zero_detect_perf.c /isa-l/mem/mem_zero_detect_test.c /isa-l/raid/Makefile.am /isa-l/raid/pq_check_test.c /isa-l/raid/pq_gen_perf.c /isa-l/raid/pq_gen_test.c /isa-l/raid/xor_check_test.c /isa-l/raid/xor_example.c /isa-l/raid/xor_gen_perf.c /isa-l/raid/xor_gen_test.c gen_nmake.mk
d5928e37	08-Jun-2021	Greg Tucker <greg.b.tucker@intel.com>	build: Fix missing ms function export Windows def file was missing an exported ec support function. Also added path in nmake file to build extra examples. Change-Id: I59ac1599dcb8cdb45077347c74b57a build: Fix missing ms function export Windows def file was missing an exported ec support function. Also added path in nmake file to build extra examples. Change-Id: I59ac1599dcb8cdb45077347c74b57aeca4751c35 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/.travis.yml /isa-l/Makefile.nmake /isa-l/README.md /isa-l/crc/crc16_t10dif_op_perf.c /isa-l/doc/build.md /isa-l/examples/ec/Makefile /isa-l/isa-l.def /isa-l/make.inc gen_nmake.mk
fe4b7f9a	06-May-2021	Greg Tucker <greg.b.tucker@intel.com>	Add toplevel header gen in windows Change-Id: I3a1e5fc495266d8ba223d75384625e22c3cf66fe Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> /isa-l/Doxyfile /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/README.md /isa-l/Release_notes.txt /isa-l/configure.ac /isa-l/doc/build.md /isa-l/doc/test.md /isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_vect_mad_neon.S /isa-l/igzip/aarch64/data_struct_aarch64.h /isa-l/igzip/aarch64/gen_icf_map.S /isa-l/igzip/aarch64/igzip_decode_huffman_code_block_aarch64.S /isa-l/igzip/generate_custom_hufftables.c /isa-l/igzip/generate_static_inflate.c /isa-l/igzip/igzip.c /isa-l/igzip/igzip_file_perf.c /isa-l/igzip/igzip_inflate.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/static_inflate.h /isa-l/include/igzip_lib.h /isa-l/include/raid.h /isa-l/isa-l.def /isa-l/make.inc /isa-l/programs/igzip.1 /isa-l/raid/raid_base.c gen_nmake.mk
d7927673	20-Oct-2020	Greg Tucker <greg.b.tucker@intel.com>	igzip: Inflate detect pre-gen header and use pre-expanded Performance improvement for inflate to skip the time-consuming process of decode table expansion when the header matches a known common dyma igzip: Inflate detect pre-gen header and use pre-expanded Performance improvement for inflate to skip the time-consuming process of decode table expansion when the header matches a known common dymanic one such as produced by level 0 compression. Change-Id: Ia2550b812a062b7cc2eb1b72bcb609f1a631e40b Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/igzip/generate_static_inflate.c /isa-l/igzip/igzip_inflate.c /isa-l/igzip/static_inflate.h test_extended.sh
cc9ed539	27-Aug-2020	Greg Tucker <greg.b.tucker@intel.com>	build: Fix nmake check for multiple arch Change-Id: I36c3616163f6fec61dda9cf8b35ca561e59477c9 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> test_extended.sh
794b8b60	26-Aug-2020	Greg Tucker <greg.b.tucker@intel.com>	build: Add test to check for nmake consistency Change-Id: I1180ba749d54e7ef433b01b33450e52ac5dbb2bb Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> /isa-l/Makefile.nmake /isa-l/README.md /isa-l/configure.ac /isa-l/crc/Makefile.am /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc32_aarch64_common.h /isa-l/crc/aarch64/crc32_gzip_refl_3crc_fold.S /isa-l/crc/aarch64/crc32_gzip_refl_crc_ext.S /isa-l/crc/aarch64/crc32_iscsi_3crc_fold.S /isa-l/crc/aarch64/crc32_iscsi_crc_ext.S /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/crc32_iscsi_by16_10.asm /isa-l/crc/crc_multibinary.asm /isa-l/igzip/igzip_inflate.c /isa-l/programs/igzip_cli.c /isa-l/programs/igzip_cli_check.sh gen_nmake.mk test_extended.sh
8074e3fe	22-May-2020	H.J. Lu <hjl.tools@gmail.com>	x86: Generate .note.gnu.property section for ELF output We should generate .note.gnu.property section with x86 assembly codes for ELF outputs to mark Intel CET support when Intel CET is enabled sinc x86: Generate .note.gnu.property section for ELF output We should generate .note.gnu.property section with x86 assembly codes for ELF outputs to mark Intel CET support when Intel CET is enabled since all input files must be marked with Intel CET support in order for linker to mark output with Intel CET support. Since nasm and yasm can't generate the proper .note.gnu.property section, yasm-cet-filter.sh and yasm-filter.sh are added to generate the proper .note.gnu.property with linker help. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 on Linux/x86-64. Change-Id: I14e03a8a9031c8397dc36939a528cf5a827d775a Signed-off-by: H.J. Lu <hjl.tools@gmail.com> show more ... /isa-l/Makefile.am /isa-l/configure.ac /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc32_common_crc_ext_cortex_a72.S /isa-l/crc/aarch64/crc32_common_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32_crc_ext_cortex_a72.S /isa-l/crc/aarch64/crc32_mix_default.S /isa-l/crc/aarch64/crc32_mix_default_common.S /isa-l/crc/aarch64/crc32_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32c_crc_ext_cortex_a72.S /isa-l/crc/aarch64/crc32c_mix_default.S /isa-l/crc/aarch64/crc32c_mix_neoverse_n1.S /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/crc16_t10dif_01.asm /isa-l/crc/crc16_t10dif_02.asm /isa-l/crc/crc16_t10dif_by16_10.asm /isa-l/crc/crc16_t10dif_by4.asm /isa-l/crc/crc16_t10dif_copy_by4.asm /isa-l/crc/crc16_t10dif_copy_by4_02.asm /isa-l/crc/crc32_gzip_refl_by16_10.asm /isa-l/crc/crc32_gzip_refl_by8.asm /isa-l/crc/crc32_gzip_refl_by8_02.asm /isa-l/crc/crc32_ieee_01.asm /isa-l/crc/crc32_ieee_02.asm /isa-l/crc/crc32_ieee_by16_10.asm /isa-l/crc/crc32_ieee_by4.asm /isa-l/crc/crc32_iscsi_00.asm /isa-l/crc/crc32_iscsi_01.asm /isa-l/crc/crc64_ecma_norm_by8.asm /isa-l/crc/crc64_ecma_refl_by8.asm /isa-l/crc/crc64_iso_norm_by16_10.asm /isa-l/crc/crc64_iso_norm_by8.asm /isa-l/crc/crc64_iso_refl_by16_10.asm /isa-l/crc/crc64_iso_refl_by8.asm /isa-l/crc/crc64_jones_norm_by8.asm /isa-l/crc/crc64_jones_refl_by8.asm /isa-l/crc/crc_multibinary.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_2vect_dot_prod_sse.asm /isa-l/erasure_code/gf_2vect_mad_avx.asm /isa-l/erasure_code/gf_2vect_mad_avx2.asm /isa-l/erasure_code/gf_2vect_mad_avx512.asm /isa-l/erasure_code/gf_2vect_mad_sse.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_3vect_dot_prod_sse.asm /isa-l/erasure_code/gf_3vect_mad_avx.asm /isa-l/erasure_code/gf_3vect_mad_avx2.asm /isa-l/erasure_code/gf_3vect_mad_avx512.asm /isa-l/erasure_code/gf_3vect_mad_sse.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_4vect_dot_prod_sse.asm /isa-l/erasure_code/gf_4vect_mad_avx.asm /isa-l/erasure_code/gf_4vect_mad_avx2.asm /isa-l/erasure_code/gf_4vect_mad_avx512.asm /isa-l/erasure_code/gf_4vect_mad_sse.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_5vect_dot_prod_sse.asm /isa-l/erasure_code/gf_5vect_mad_avx.asm /isa-l/erasure_code/gf_5vect_mad_avx2.asm /isa-l/erasure_code/gf_5vect_mad_avx512.asm /isa-l/erasure_code/gf_5vect_mad_sse.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_6vect_dot_prod_sse.asm /isa-l/erasure_code/gf_6vect_mad_avx.asm /isa-l/erasure_code/gf_6vect_mad_avx2.asm /isa-l/erasure_code/gf_6vect_mad_avx512.asm /isa-l/erasure_code/gf_6vect_mad_sse.asm /isa-l/erasure_code/gf_vect_dot_prod_avx.asm /isa-l/erasure_code/gf_vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_vect_dot_prod_sse.asm /isa-l/erasure_code/gf_vect_mad_avx.asm /isa-l/erasure_code/gf_vect_mad_avx2.asm /isa-l/erasure_code/gf_vect_mad_avx512.asm /isa-l/erasure_code/gf_vect_mad_sse.asm /isa-l/erasure_code/gf_vect_mul_avx.asm /isa-l/erasure_code/gf_vect_mul_sse.asm /isa-l/igzip/adler32_avx2_4.asm /isa-l/igzip/adler32_sse.asm /isa-l/igzip/encode_df_04.asm /isa-l/igzip/encode_df_06.asm /isa-l/igzip/igzip_body.asm /isa-l/igzip/igzip_decode_block_stateless.asm /isa-l/igzip/igzip_deflate_hash.asm /isa-l/igzip/igzip_finish.asm /isa-l/igzip/igzip_gen_icf_map_lh1_04.asm /isa-l/igzip/igzip_gen_icf_map_lh1_06.asm /isa-l/igzip/igzip_icf_body_h1_gr_bt.asm /isa-l/igzip/igzip_icf_finish.asm /isa-l/igzip/igzip_set_long_icf_fg_04.asm /isa-l/igzip/igzip_set_long_icf_fg_06.asm /isa-l/igzip/igzip_update_histogram.asm /isa-l/igzip/proc_heap.asm /isa-l/include/multibinary.asm /isa-l/include/reg_sizes.asm /isa-l/mem/mem_zero_detect_avx.asm /isa-l/mem/mem_zero_detect_sse.asm /isa-l/raid/pq_check_sse.asm /isa-l/raid/pq_check_sse_i32.asm /isa-l/raid/pq_gen_avx.asm /isa-l/raid/pq_gen_avx2.asm /isa-l/raid/pq_gen_avx512.asm /isa-l/raid/pq_gen_sse.asm /isa-l/raid/pq_gen_sse_i32.asm /isa-l/raid/raid_multibinary.asm /isa-l/raid/xor_check_sse.asm /isa-l/raid/xor_gen_avx.asm /isa-l/raid/xor_gen_avx512.asm /isa-l/raid/xor_gen_sse.asm nasm-cet-filter.sh yasm-cet-filter.sh
5e586843	30-Mar-2020	Greg Tucker <greg.b.tucker@intel.com>	build: Change ms nmake default to nasm and add pdb gen The nmake default is changed for a modern nasm. Older nasm and yasm versions will still work with windows but the nmake options must be changed build: Change ms nmake default to nasm and add pdb gen The nmake default is changed for a modern nasm. Older nasm and yasm versions will still work with windows but the nmake options must be changed appropriately for max AS_FEATURE_LEVEL to match. Also now generates debug symbol pdb files. Change-Id: I94a2dd7ecf541c6564ccbd4a184c33995d7b31ad Signed-off-by: Poornima Kumar <poornima.kumar@intel.com> Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/Makefile.nmake /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc32_common_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32_mix_neoverse_n1.S /isa-l/crc/aarch64/crc32c_mix_neoverse_n1.S /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/crc16_t10dif_01.asm /isa-l/crc/crc16_t10dif_02.asm /isa-l/crc/crc16_t10dif_by16_10.asm /isa-l/crc/crc16_t10dif_by4.asm /isa-l/crc/crc16_t10dif_copy_by4.asm /isa-l/crc/crc16_t10dif_copy_by4_02.asm /isa-l/crc/crc32_gzip_refl_by16_10.asm /isa-l/crc/crc32_gzip_refl_by8.asm /isa-l/crc/crc32_gzip_refl_by8_02.asm /isa-l/crc/crc32_ieee_01.asm /isa-l/crc/crc32_ieee_02.asm /isa-l/crc/crc32_ieee_by16_10.asm /isa-l/crc/crc32_ieee_by4.asm /isa-l/crc/crc32_iscsi_00.asm /isa-l/crc/crc32_iscsi_01.asm /isa-l/crc/crc64_ecma_norm_by8.asm /isa-l/crc/crc64_ecma_refl_by8.asm /isa-l/crc/crc64_iso_norm_by16_10.asm /isa-l/crc/crc64_iso_norm_by8.asm /isa-l/crc/crc64_iso_refl_by16_10.asm /isa-l/crc/crc64_iso_refl_by8.asm /isa-l/crc/crc64_jones_norm_by8.asm /isa-l/crc/crc64_jones_refl_by8.asm /isa-l/crc/crc_multibinary.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_2vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_2vect_dot_prod_sse.asm /isa-l/erasure_code/gf_2vect_mad_avx.asm /isa-l/erasure_code/gf_2vect_mad_avx2.asm /isa-l/erasure_code/gf_2vect_mad_avx512.asm /isa-l/erasure_code/gf_2vect_mad_sse.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_3vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_3vect_dot_prod_sse.asm /isa-l/erasure_code/gf_3vect_mad_avx.asm /isa-l/erasure_code/gf_3vect_mad_avx2.asm /isa-l/erasure_code/gf_3vect_mad_avx512.asm /isa-l/erasure_code/gf_3vect_mad_sse.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_4vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_4vect_dot_prod_sse.asm /isa-l/erasure_code/gf_4vect_mad_avx.asm /isa-l/erasure_code/gf_4vect_mad_avx2.asm /isa-l/erasure_code/gf_4vect_mad_avx512.asm /isa-l/erasure_code/gf_4vect_mad_sse.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_5vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_5vect_dot_prod_sse.asm /isa-l/erasure_code/gf_5vect_mad_avx.asm /isa-l/erasure_code/gf_5vect_mad_avx2.asm /isa-l/erasure_code/gf_5vect_mad_avx512.asm /isa-l/erasure_code/gf_5vect_mad_sse.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_6vect_dot_prod_sse.asm /isa-l/erasure_code/gf_6vect_mad_avx.asm /isa-l/erasure_code/gf_6vect_mad_avx2.asm /isa-l/erasure_code/gf_6vect_mad_avx512.asm /isa-l/erasure_code/gf_6vect_mad_sse.asm /isa-l/erasure_code/gf_vect_dot_prod_avx.asm /isa-l/erasure_code/gf_vect_dot_prod_avx2.asm /isa-l/erasure_code/gf_vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_vect_dot_prod_sse.asm /isa-l/erasure_code/gf_vect_mad_avx.asm /isa-l/erasure_code/gf_vect_mad_avx2.asm /isa-l/erasure_code/gf_vect_mad_avx512.asm /isa-l/erasure_code/gf_vect_mad_sse.asm /isa-l/erasure_code/gf_vect_mul_avx.asm /isa-l/erasure_code/gf_vect_mul_sse.asm /isa-l/igzip/adler32_avx2_4.asm /isa-l/igzip/adler32_sse.asm /isa-l/igzip/encode_df_04.asm /isa-l/igzip/encode_df_06.asm /isa-l/igzip/igzip_body.asm /isa-l/igzip/igzip_decode_block_stateless.asm /isa-l/igzip/igzip_deflate_hash.asm /isa-l/igzip/igzip_finish.asm /isa-l/igzip/igzip_gen_icf_map_lh1_04.asm /isa-l/igzip/igzip_gen_icf_map_lh1_06.asm /isa-l/igzip/igzip_icf_body_h1_gr_bt.asm /isa-l/igzip/igzip_icf_finish.asm /isa-l/igzip/igzip_set_long_icf_fg_04.asm /isa-l/igzip/igzip_set_long_icf_fg_06.asm /isa-l/igzip/igzip_update_histogram.asm /isa-l/igzip/proc_heap.asm /isa-l/igzip/rfc1951_lookup.asm /isa-l/include/aarch64_multibinary.h /isa-l/include/multibinary.asm /isa-l/include/reg_sizes.asm /isa-l/mem/mem_zero_detect_avx.asm /isa-l/mem/mem_zero_detect_sse.asm /isa-l/raid/pq_check_sse.asm /isa-l/raid/pq_check_sse_i32.asm /isa-l/raid/pq_gen_avx.asm /isa-l/raid/pq_gen_avx2.asm /isa-l/raid/pq_gen_avx512.asm /isa-l/raid/pq_gen_sse.asm /isa-l/raid/pq_gen_sse_i32.asm /isa-l/raid/raid_multibinary.asm /isa-l/raid/xor_check_sse.asm /isa-l/raid/xor_gen_avx.asm /isa-l/raid/xor_gen_avx512.asm /isa-l/raid/xor_gen_sse.asm gen_nmake.mk
7c0ab1d4	07-Mar-2020	Greg Tucker <greg.b.tucker@intel.com>	build: Add auto regenerate of nmake file Change-Id: Icaa64aa35697c87779df18c3941d3df0f3256546 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> /isa-l/.drone.yml /isa-l/.travis.yml /isa-l/Makefile.am /isa-l/Makefile.nmake /isa-l/Makefile.unx /isa-l/README.md /isa-l/Release_notes.txt /isa-l/configure.ac /isa-l/crc/Makefile.am /isa-l/crc/aarch64/crc32_gzip_refl_pmull.h /isa-l/crc/aarch64/crc32_ieee_norm_pmull.h /isa-l/crc/aarch64/crc32_iscsi_refl_pmull.h /isa-l/crc/aarch64/crc32_norm_common_pmull.h /isa-l/crc/aarch64/crc32_refl_common_pmull.h /isa-l/crc/aarch64/crc64_ecma_norm_pmull.h /isa-l/crc/aarch64/crc64_ecma_refl_pmull.h /isa-l/crc/aarch64/crc64_iso_norm_pmull.h /isa-l/crc/aarch64/crc64_iso_refl_pmull.h /isa-l/crc/aarch64/crc64_jones_norm_pmull.h /isa-l/crc/aarch64/crc64_jones_refl_pmull.h /isa-l/crc/aarch64/crc64_norm_common_pmull.h /isa-l/crc/aarch64/crc64_refl_common_pmull.h /isa-l/crc/aarch64/crc_common_pmull.h /isa-l/crc/crc16_t10dif_02.asm /isa-l/crc/crc16_t10dif_by16_10.asm /isa-l/crc/crc16_t10dif_copy_by4_02.asm /isa-l/crc/crc32_gzip_refl_by16_10.asm /isa-l/crc/crc32_gzip_refl_by8_02.asm /isa-l/crc/crc32_ieee_02.asm /isa-l/crc/crc32_ieee_by16_10.asm /isa-l/crc/crc_multibinary.asm /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/aarch64/gf_2vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_3vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_4vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_5vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_vect_mad_neon.S /isa-l/erasure_code/ec_highlevel_func.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/gf_5vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_5vect_mad_avx512.asm /isa-l/erasure_code/gf_6vect_dot_prod_avx512.asm /isa-l/erasure_code/gf_6vect_mad_avx512.asm /isa-l/erasure_code/ppc64le/Makefile.am /isa-l/erasure_code/ppc64le/ec_base_vsx.c /isa-l/erasure_code/ppc64le/ec_base_vsx.h /isa-l/erasure_code/ppc64le/gf_2vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_2vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_3vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_3vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_4vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_4vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_5vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_5vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_6vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_6vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_dot_prod_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_mad_vsx.c /isa-l/erasure_code/ppc64le/gf_vect_mul_vsx.c /isa-l/igzip/Makefile.am /isa-l/igzip/aarch64/encode_df.S /isa-l/igzip/aarch64/gen_icf_map.S /isa-l/igzip/aarch64/huffman_aarch64.h /isa-l/igzip/aarch64/igzip_decode_huffman_code_block_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_body_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_finish_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_hash_aarch64.S /isa-l/igzip/aarch64/igzip_inflate_multibinary_arm64.S /isa-l/igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c /isa-l/igzip/aarch64/igzip_multibinary_arm64.S /isa-l/igzip/aarch64/igzip_set_long_icf_fg.S /isa-l/igzip/aarch64/isal_deflate_icf_body_hash_hist.S /isa-l/igzip/aarch64/isal_deflate_icf_finish_hash_hist.S /isa-l/igzip/aarch64/isal_update_histogram.S /isa-l/igzip/igzip.c /isa-l/igzip/igzip_build_hash_table_perf.c /isa-l/igzip/igzip_hist_perf.c /isa-l/igzip/igzip_perf.c /isa-l/igzip/igzip_semi_dyn_file_perf.c /isa-l/include/aarch64_multibinary.h /isa-l/include/erasure_code.h /isa-l/include/multibinary.asm /isa-l/isa-l.def /isa-l/make.inc /isa-l/mem/Makefile.am /isa-l/programs/igzip.1 /isa-l/raid/Makefile.am gen_nmake.mk
e6848434	28-Oct-2019	Greg Tucker <greg.b.tucker@intel.com>	test: Fix issue keeping mingw tests from running Change-Id: I1e72ed99c2f09cbad488774313cddafdb1ce5de8 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> /isa-l/.travis.yml /isa-l/CONTRIBUTING.md /isa-l/Doxyfile /isa-l/Makefile.am /isa-l/README.md /isa-l/Release_notes.txt /isa-l/configure.ac /isa-l/crc/Makefile.am /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc16_t10dif_copy_pmull.S /isa-l/crc/aarch64/crc16_t10dif_pmull.S /isa-l/crc/aarch64/crc_aarch64_dispatcher.c /isa-l/crc/aarch64/crc_multibinary_arm.S /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc64_ecma_norm_by16_10.asm /isa-l/crc/crc64_ecma_refl_by16_10.asm /isa-l/crc/crc64_funcs_test.c /isa-l/crc/crc64_iso_norm_by16_10.asm /isa-l/crc/crc64_iso_refl_by16_10.asm /isa-l/crc/crc64_jones_norm_by16_10.asm /isa-l/crc/crc64_jones_refl_by16_10.asm /isa-l/crc/crc64_multibinary.asm /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/aarch64/Makefile.am /isa-l/erasure_code/aarch64/ec_aarch64_dispatcher.c /isa-l/erasure_code/aarch64/ec_aarch64_highlevel_func.c /isa-l/erasure_code/aarch64/ec_multibinary_arm.S /isa-l/erasure_code/aarch64/gf_2vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_3vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_4vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_5vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_vect_dot_prod_neon.S /isa-l/erasure_code/aarch64/gf_vect_mad_neon.S /isa-l/erasure_code/aarch64/gf_vect_mul_neon.S /isa-l/erasure_code/ec_base.h /isa-l/erasure_code/ec_multibinary.asm /isa-l/igzip/Makefile.am /isa-l/igzip/aarch64/bitbuf2_aarch64.h /isa-l/igzip/aarch64/data_struct_aarch64.h /isa-l/igzip/aarch64/huffman_aarch64.h /isa-l/igzip/aarch64/igzip_deflate_body_aarch64.S /isa-l/igzip/aarch64/igzip_deflate_finish_aarch64.S /isa-l/igzip/aarch64/igzip_inflate_multibinary_arm64.S /isa-l/igzip/aarch64/igzip_isal_adler32_neon.S /isa-l/igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c /isa-l/igzip/aarch64/igzip_multibinary_arm64.S /isa-l/igzip/aarch64/isal_deflate_icf_body_hash_hist.S /isa-l/igzip/aarch64/isal_deflate_icf_finish_hash_hist.S /isa-l/igzip/aarch64/isal_update_histogram.S /isa-l/igzip/aarch64/lz0a_const_aarch64.h /isa-l/igzip/aarch64/options_aarch64.h /isa-l/igzip/aarch64/stdmac_aarch64.h /isa-l/igzip/igzip_multibinary.asm /isa-l/include/aarch64_multibinary.h /isa-l/include/multibinary.asm /isa-l/include/reg_sizes.asm /isa-l/isa-l.def /isa-l/make.inc /isa-l/mem/aarch64/Makefile.am /isa-l/mem/aarch64/mem_aarch64_dispatcher.c /isa-l/mem/aarch64/mem_multibinary_arm.S /isa-l/programs/igzip.1 /isa-l/programs/igzip_cli.c /isa-l/raid/aarch64/Makefile.am /isa-l/raid/aarch64/raid_aarch64_dispatcher.c /isa-l/raid/aarch64/raid_multibinary_arm.S /isa-l/raid/raid_multibinary.asm test_extended.sh
a95292aa	26-Apr-2019	Jun He <jun.he@arm.com>	ci: add drone.io for arm64 verification Change-Id: Ib357be80e7e9d7c0ab62433ee5fda4b962592553 Signed-off-by: Jun He <jun.he@arm.com> /isa-l/.drone.yml /isa-l/.travis.yml /isa-l/crc/aarch64/crc_multibinary_arm.S /isa-l/erasure_code/gf_vect_mad_test.c /isa-l/igzip/huff_codes.c /isa-l/igzip/huffman.h /isa-l/igzip/igzip.c /isa-l/include/erasure_code.h /isa-l/make.inc /isa-l/programs/igzip_cli.c test_extended.sh
430e862a	03-Jul-2019	Greg Tucker <greg.b.tucker@intel.com>	Change indent format for minimal changes with latest Latest indent 2.2.12 has some changes and bug fixes including adding -sar to -kr and recognizing size_t as a standard type. Change-Id: Id613cfb3 Change indent format for minimal changes with latest Latest indent 2.2.12 has some changes and bug fixes including adding -sar to -kr and recognizing size_t as a standard type. Change-Id: Id613cfb3cebdbe8e9e8823236adb5ee6eb712229 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com> show more ... /isa-l/.gitignore /isa-l/Makefile.am /isa-l/README.md /isa-l/Release_notes.txt /isa-l/configure.ac /isa-l/crc/Makefile.am /isa-l/crc/aarch64/Makefile.am /isa-l/crc/aarch64/crc16_t10dif_copy_pmull.S /isa-l/crc/aarch64/crc16_t10dif_pmull.S /isa-l/crc/aarch64/crc32_gzip_refl_hw_fold.S /isa-l/crc/aarch64/crc32_gzip_refl_pmull.S /isa-l/crc/aarch64/crc32_gzip_refl_pmull.h /isa-l/crc/aarch64/crc32_ieee_norm_pmull.S /isa-l/crc/aarch64/crc32_ieee_norm_pmull.h /isa-l/crc/aarch64/crc32_iscsi_refl_hw_fold.S /isa-l/crc/aarch64/crc32_iscsi_refl_pmull.S /isa-l/crc/aarch64/crc32_iscsi_refl_pmull.h /isa-l/crc/aarch64/crc32_norm_common_pmull.h /isa-l/crc/aarch64/crc32_refl_common_pmull.h /isa-l/crc/aarch64/crc64_ecma_norm_pmull.S /isa-l/crc/aarch64/crc64_ecma_norm_pmull.h /isa-l/crc/aarch64/crc64_ecma_refl_pmull.S /isa-l/crc/aarch64/crc64_ecma_refl_pmull.h /isa-l/crc/aarch64/crc64_iso_norm_pmull.S /isa-l/crc/aarch64/crc64_iso_norm_pmull.h /isa-l/crc/aarch64/crc64_iso_refl_pmull.S /isa-l/crc/aarch64/crc64_iso_refl_pmull.h /isa-l/crc/aarch64/crc64_jones_norm_pmull.S /isa-l/crc/aarch64/crc64_jones_norm_pmull.h /isa-l/crc/aarch64/crc64_jones_refl_pmull.S /isa-l/crc/aarch64/crc64_jones_refl_pmull.h /isa-l/crc/aarch64/crc64_norm_common_pmull.h /isa-l/crc/aarch64/crc64_refl_common_pmull.h /isa-l/crc/aarch64/crc_multibinary_arm.S /isa-l/crc/crc16_t10dif_copy_perf.c /isa-l/crc/crc16_t10dif_copy_test.c /isa-l/crc/crc16_t10dif_op_perf.c /isa-l/crc/crc16_t10dif_perf.c /isa-l/crc/crc16_t10dif_test.c /isa-l/crc/crc32_funcs_test.c /isa-l/crc/crc32_gzip_refl_perf.c /isa-l/crc/crc32_ieee_perf.c /isa-l/crc/crc32_iscsi_perf.c /isa-l/crc/crc64_base.c /isa-l/crc/crc64_funcs_perf.c /isa-l/crc/crc64_funcs_test.c /isa-l/crc/crc64_ref.h /isa-l/crc/crc_base.c /isa-l/crc/crc_ref.h /isa-l/erasure_code/Makefile.am /isa-l/erasure_code/erasure_code_base_perf.c /isa-l/erasure_code/erasure_code_perf.c /isa-l/erasure_code/erasure_code_update_perf.c /isa-l/erasure_code/gf_vect_dot_prod_1tbl.c /isa-l/erasure_code/gf_vect_dot_prod_perf.c /isa-l/erasure_code/gf_vect_mul_perf.c /isa-l/examples/ec/ec_piggyback_example.c /isa-l/igzip/Makefile.am /isa-l/igzip/adler32_perf.c /isa-l/igzip/encode_df_06.asm /isa-l/igzip/generate_custom_hufftables.c /isa-l/igzip/igzip.c /isa-l/igzip/igzip_build_hash_table_perf.c /isa-l/igzip/igzip_file_perf.c /isa-l/igzip/igzip_hist_perf.c /isa-l/igzip/igzip_inflate_test.c /isa-l/igzip/igzip_perf.c /isa-l/igzip/igzip_rand_test.c /isa-l/igzip/igzip_semi_dyn_file_perf.c /isa-l/include/multibinary_arm.h /isa-l/include/test.h /isa-l/isa-l.def /isa-l/make.inc /isa-l/mem/mem_zero_detect_perf.c /isa-l/programs/igzip.1 /isa-l/programs/igzip.1.h2m /isa-l/programs/igzip_cli.c /isa-l/programs/igzip_cli_check.sh /isa-l/raid/pq_gen_perf.c /isa-l/raid/xor_gen_perf.c /isa-l/tests/fuzz/igzip_fuzz_inflate.c check_format.sh iindent
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