History log of /isa-l/igzip/encode_df_06.asm (Results 1 – 7 of 7)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v2.31.0, v2.30.0
# cd888f01 22-May-2020 H.J. Lu <hjl.tools@gmail.com>

x86: Add ENDBR32/ENDBR64 at function entries for Intel CET

To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to
funct

x86: Add ENDBR32/ENDBR64 at function entries for Intel CET

To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to
function entries in x86 assembly codes which are indirect branch
targets as discovered by running testsuite on Intel CET machine and
visual inspection.

Verified with

$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
$ make -j8 check

with both nasm and yasm on both CET and non-CET machines.

Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>

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# ede04f0a 16-Mar-2020 Greg Tucker <greg.b.tucker@intel.com>

build: Fix for windows to allow nasm use

Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm. This adds a few macros and fixes s

build: Fix for windows to allow nasm use

Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm. This adds a few macros and fixes so
nasm can be used to build on windows.

Change-Id: Ia05dc3ff482f33b0f915bb1be3c7df5e4a753b3a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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Revision tags: v2.29.0, v2.28.0, v2.27.0, v2.26.0
# 31eca503 19-Feb-2019 Roy Oursler <roy.j.oursler@intel.com>

igzip: Modify last byte retrieval method

Change-Id: I3ba7e9bd007277be543ba7a6299d5acc5c848bd2
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>


# 67c4e265 19-Feb-2019 Roy Oursler <roy.j.oursler@intel.com>

igzip: Remove unneeded generation of k register

Change-Id: I79bfb3b3a3feeb969a0c0ec92b7ae0633f6be1b0
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>


# 28da992a 19-Feb-2019 Roy Oursler <roy.j.oursler@intel.com>

igzip: Reduce data used in encode_df_06.asm

Change-Id: I83dbca452840c07b0fd77faaf9d35c46065f8a08
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>


Revision tags: v2.25.0, v2.24.0, v2.23.0
# b1c45175 21-Jun-2018 Greg Tucker <greg.b.tucker@intel.com>

igzip: Add a few missing asm copyright headers

Change-Id: Iddcfbd357efa17dbbd32acacac952579fc052756
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>


Revision tags: v2.22.0, v2.21.0, v2.20.0, v2.19.0, v2.18.0
# 5a55e309 10-Apr-2017 Roy Oursler <roy.j.oursler@intel.com>

igzip: Avx512 version for encdode_df

Change-Id: I1625a3d7e016805791cfd09e31909562f432fd71
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>