erasure_code: reformat using new code style

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: fix wrong return type

erasure_code/ppc64le/gf_vect_mul_vsx.c: In function '_gf_vect_mul_base':
erasure_code/ppc64le/gf_vect_mul_vsx.c:14:16: error: 'return' with a value, in function r

erasure_code: fix wrong return type

erasure_code/ppc64le/gf_vect_mul_vsx.c: In function '_gf_vect_mul_base':
erasure_code/ppc64le/gf_vect_mul_vsx.c:14:16: error: 'return' with a value, in function returning void [-Wreturn-mismatch]
14 | return 0;
| ^
erasure_code/ppc64le/gf_vect_mul_vsx.c:6:13: note: declared here
6 | static void _gf_vect_mul_base(int len, unsigned char *a, unsigned char *src,
| ^~~~~~~~~~~~~~~~~

Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>

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erasure_code: use internal gf_vect_mul_base for ppc64le encoding

gf_vect_mul_base is expected to work for all buffer sizes.
However, this function is checking for size alignment to 32 bytes,
to foll

erasure_code: use internal gf_vect_mul_base for ppc64le encoding

gf_vect_mul_base is expected to work for all buffer sizes.
However, this function is checking for size alignment to 32 bytes,
to follow the other gf_vect_mul implementations.
Therefore, another implementation for this function is included
inside ppc64le folder to be used by the encoding functions.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

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erasure_code: check for size alignment on powerpc gf_vect_mul_vsx implementation

Follows the rest of the gf_vect_mul implementations for other architectures,
and checks for size alignment, stated in

erasure_code: check for size alignment on powerpc gf_vect_mul_vsx implementation

Follows the rest of the gf_vect_mul implementations for other architectures,
and checks for size alignment, stated in the documentation.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

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erasure_code: add missing aarch64 and powerpc interface for ec_init_tables

ec_init_tables is now a multi-implementation function,
so it requires a dispatcher for all architectures.

Signed-off-by: P

erasure_code: add missing aarch64 and powerpc interface for ec_init_tables

ec_init_tables is now a multi-implementation function,
so it requires a dispatcher for all architectures.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

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Correct loop bounds check in aarch64 gf_vect_mul

Prior to this change, a missing loop bounds check in the aarch64
version of gf_vect_mul would cause the routine to return 1 (error)
in the normal cas

Correct loop bounds check in aarch64 gf_vect_mul

Prior to this change, a missing loop bounds check in the aarch64
version of gf_vect_mul would cause the routine to return 1 (error)
in the normal case.

This change introduces a check and branch to "return_pass" (success), and
also adds checks of the return code of gf_vect_mul to the supplied unit
test; it was previously ignored.

Change-Id: I9f7fe0014189b24f9600e0473ee02b5316c2da91
Signed-off-by: Surendar Chandra <vsurench@amazon.com>

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enable VSX SIMD in ISA-L for ppc64le

1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update

Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Ax

enable VSX SIMD in ISA-L for ppc64le

1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update

Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>

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