erasure_code: reformat using new code style

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 5vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 4vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 3vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 2vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add 2 vector AVX2 dot product with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add 3 vector AVX2 dot product with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add initial AVX2 mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add initial AVX2 dot product with GFNI implementation

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: implement EC update with AVX512 + GFNI

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

erasure_code: implement EC with AVX512 + GFNI

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Remove all slver legacy segments

The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead

Remove all slver legacy segments

The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead of fixing since
its usefulness is waining. Fixes #221

Change-Id: Ife0b9f105950a90337c58e8a41ac2cffc0f67d99
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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ec: add AVX512 ec functions with 5 and 6 outputs

Added AVX512 optimized functions to calculate the
GF(2^8) vector dot product with 5 and 6 outputs
at a time. Also added GF(2^8) vector multiply
AVX51

ec: add AVX512 ec functions with 5 and 6 outputs

Added AVX512 optimized functions to calculate the
GF(2^8) vector dot product with 5 and 6 outputs
at a time. Also added GF(2^8) vector multiply
AVX512 optimized functions with 5 and 6 accumulate.

Change-Id: I6d2c080f4f4f8e4823ad9a9be2c65c3b5b3bb1f8
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>

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ec: Remove references in lib source to types.h

Change-Id: I3e8db92626c92d21c2426bbad89a10fa10c3e002
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: use standard types in struct slver

This matches the definition of struct slver elsewhere in the code.

Removes the last use of [U]INT{8,16,32,64} types.

Change-Id: I70761ac27add1e19808f1cebd6a7

ec: use standard types in struct slver

This matches the definition of struct slver elsewhere in the code.

Removes the last use of [U]INT{8,16,32,64} types.

Change-Id: I70761ac27add1e19808f1cebd6a7ee69ebd08dee
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>

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build: fix compilation with CPU not supporting SSE

This patch makes the project compile and run (tests and
performance tests as well) with CPUs which are not
supporting SSE instructions.

Signed-off

build: fix compilation with CPU not supporting SSE

This patch makes the project compile and run (tests and
performance tests as well) with CPUs which are not
supporting SSE instructions.

Signed-off-by: Jean-Yves Vet <jyvet@ddn.com>

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Format only patch from iindent and remove_whitespace

Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: Fixes for 32-bit build

Change-Id: Iac362f0d7282716a8502afcec939b0d1877a943f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

Add avx512 versions of ec_encode_data

- Includes gf_nvect_dot_prod, gf_nvect_mad functions
- Change ec multibinary to use common macros
- Autoconf checks for nasm or yasm support and picks if ava

Add avx512 versions of ec_encode_data

- Includes gf_nvect_dot_prod, gf_nvect_mad functions
- Change ec multibinary to use common macros
- Autoconf checks for nasm or yasm support and picks if available
- Leave out compile of any avx512 code if assembler not available

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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Initial commit isa-l v2.14.1

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>