erasure_code: add AVX2 5vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 4vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 3vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add AVX2 2vect mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add 2 vector AVX2 dot product with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add 3 vector AVX2 dot product with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add initial AVX2 mad with GFNI implementation

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: add initial AVX2 dot product with GFNI implementation

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

erasure_code: implement EC update with AVX512 + GFNI

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

erasure_code: implement EC with AVX512 + GFNI

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

build: Remove unneeded file types.h

The file types.h has long been misnamed and overlaps with
functionality in the test helper routines.

Change-Id: I774047d3a0074198b67a6b4e909f1e2ce1938195
Signed-

build: Remove unneeded file types.h

The file types.h has long been misnamed and overlaps with
functionality in the test helper routines.

Change-Id: I774047d3a0074198b67a6b4e909f1e2ce1938195
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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ec: Remove arch-specific redundant gf_nvect tests

The gf_{2-6}vect_dot_prod tests were kept in other_tests since the 5,6vect
functions were not strictly called by the higher level ec_encode_data() a

ec: Remove arch-specific redundant gf_nvect tests

The gf_{2-6}vect_dot_prod tests were kept in other_tests since the 5,6vect
functions were not strictly called by the higher level ec_encode_data() and
needed independent testing. As this has now changed the extra tests can be
removed as redundant.

Change-Id: I8a95e31487b150a2a8f929c5586785524d951fde
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

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enable VSX SIMD in ISA-L for ppc64le

1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update

Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Ax

enable VSX SIMD in ISA-L for ppc64le

1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update

Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>

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ec: add AVX512 ec functions with 5 and 6 outputs

Added AVX512 optimized functions to calculate the
GF(2^8) vector dot product with 5 and 6 outputs
at a time. Also added GF(2^8) vector multiply
AVX51

ec: add AVX512 ec functions with 5 and 6 outputs

Added AVX512 optimized functions to calculate the
GF(2^8) vector dot product with 5 and 6 outputs
at a time. Also added GF(2^8) vector multiply
AVX512 optimized functions with 5 and 6 accumulate.

Change-Id: I6d2c080f4f4f8e4823ad9a9be2c65c3b5b3bb1f8
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>

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Implement aarch64 neon for erasure code.

1.Replace below erasure code interfaces to arm neon interface by mbin_interface function.
ec_encode_data
gf_vect_mul
gf_vect_dot_prod
gf_vect_mad
ec_enc

Implement aarch64 neon for erasure code.

1.Replace below erasure code interfaces to arm neon interface by mbin_interface function.
ec_encode_data
gf_vect_mul
gf_vect_dot_prod
gf_vect_mad
ec_encode_data_update

2.Utilise arm neon instrution to accelerate GF(2^8) set compute by 128bit registor.

Change-Id: Ib0ecbfbd1837d2b1f823d26815c896724d2d22e4
Signed-off-by: Zhou Xiong <zhouxiong13@huawei.com>

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aarch64: Cleanup build issues

This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).

- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
[log]

aarch64: Cleanup build issues

This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).

- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
[log] relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `xor_gen_neon' which may bind externally can not be used when making a shared object

- Add arch dependent "other_tests" to exclude x86 specific tests on Arm
[log] isa-l/erasure_code/gf_2vect_dot_prod_sse_test.c:181: undefined reference to `gf_2vect_dot_prod_sse'

- Check "fread" return value to fix gcc warnings on Arm and x86
[log] warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result [-Wunused-result]
fread(in_buf, 1, in_size, in_file);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

- Fix issue of comparing "char" with "int" on Arm. "char" is unsigned
on Arm by default, an unsigned char will never equal to EOF(-1).
[Log] programs/igzip_cli.c:318:31: warning: comparison is always true due to limited range of data type [-Wtype-limits]
while (tmp != '\n' && tmp != EOF)
^~

- Include <stdlib.h> to several files to fix build warnings on Arm
[log] igzip/igzip_inflate_perf.c:339:5: warning: incompatible implicit declaration of built-in function ‘exit’
exit(0);
^~~~

Change-Id: I82c1b63316b634b3d398ffba2ff815679d9051a8
Signed-off-by: Yibo Cai <yibo.cai@arm.com>

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ec: Remove gf_vect_mad_perf.c

Remove gf_vect_mad_perf.c as it is architecture specific and does not provide
useful information in its current format.

Change-Id: I7819679db491a9b5572128e4fc05d989b87

ec: Remove gf_vect_mad_perf.c

Remove gf_vect_mad_perf.c as it is architecture specific and does not provide
useful information in its current format.

Change-Id: I7819679db491a9b5572128e4fc05d989b870d22d
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>

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build: Add aarch64 support

Change-Id: If9594936a28355d89edd1a331b3b429dffa44184
Signed-off-by: Yibo Cai <yibo.cai@arm.com>

test: Remove redundant arch-specific tests

Change-Id: Ifdbac9d8a99888bfd7a12da5d47dd07b8f85481d
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: Determine exact conditions where gf_gen_rs_matrix works

Add a program calculating some of the exact conditions where gf_gen_rs_matrix
works, add comments stating these bounds to gf_gen_rs_matrix

ec: Determine exact conditions where gf_gen_rs_matrix works

Add a program calculating some of the exact conditions where gf_gen_rs_matrix
works, add comments stating these bounds to gf_gen_rs_matrix, and fix erasure
code test that violates the bounds.

Change-Id: I1d0010b09fea97731bfd24f4f76e24609538b24f
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>

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Format only patch from iindent and remove_whitespace

Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: Fixes for 32-bit build

Change-Id: Iac362f0d7282716a8502afcec939b0d1877a943f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: Add base function aliases

Change-Id: I36f1a7948e0009ca5f4f67437f4aa704e737a05a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

ec: Group src by arch

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>

build: Fix an include path to be srcdir relative

Allows configure to again build in an external directory. When building ISAL in
an external path, assembler or compiler needs relative include paths

build: Fix an include path to be srcdir relative

Allows configure to again build in an external directory. When building ISAL in
an external path, assembler or compiler needs relative include paths.

Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
Reviewed-by: Greg Tucker <greg.b.tucker@intel.com>

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