| 07f80287 | 19-Nov-2024 |
Cornu, Marcel D <marcel.d.cornu@intel.com> |
erasure_code: fix unaligned free error in perf apps on windows
Signed-off-by: Cornu, Marcel D <marcel.d.cornu@intel.com> |
| 300260a4 | 19-Apr-2024 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: reformat using new code style
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 38279f5e | 08-Mar-2024 |
Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp> |
Avoid using x18 register
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp> |
| 1b1ee1e1 | 20-Jan-2024 |
Mattias Ellert <mattias.ellert@physics.uu.se> |
erasure_code: fix wrong return type
erasure_code/ppc64le/gf_vect_mul_vsx.c: In function '_gf_vect_mul_base': erasure_code/ppc64le/gf_vect_mul_vsx.c:14:16: error: 'return' with a value, in function r
erasure_code: fix wrong return type
erasure_code/ppc64le/gf_vect_mul_vsx.c: In function '_gf_vect_mul_base': erasure_code/ppc64le/gf_vect_mul_vsx.c:14:16: error: 'return' with a value, in function returning void [-Wreturn-mismatch] 14 | return 0; | ^ erasure_code/ppc64le/gf_vect_mul_vsx.c:6:13: note: declared here 6 | static void _gf_vect_mul_base(int len, unsigned char *a, unsigned char *src, | ^~~~~~~~~~~~~~~~~
Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
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| e0fd7829 | 12-Jan-2024 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: use internal gf_vect_mul_base for ppc64le encoding
gf_vect_mul_base is expected to work for all buffer sizes. However, this function is checking for size alignment to 32 bytes, to foll
erasure_code: use internal gf_vect_mul_base for ppc64le encoding
gf_vect_mul_base is expected to work for all buffer sizes. However, this function is checking for size alignment to 32 bytes, to follow the other gf_vect_mul implementations. Therefore, another implementation for this function is included inside ppc64le folder to be used by the encoding functions.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| b8d5633e | 12-Jan-2024 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: check for size alignment on powerpc gf_vect_mul_vsx implementation
Follows the rest of the gf_vect_mul implementations for other architectures, and checks for size alignment, stated in
erasure_code: check for size alignment on powerpc gf_vect_mul_vsx implementation
Follows the rest of the gf_vect_mul implementations for other architectures, and checks for size alignment, stated in the documentation.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| 91e7906f | 12-Jan-2024 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: check for size on gf_vect_mul_sse/avx
gf_vect_mul requires length to be multiple of 32 bytes, so this check is added in the SSE/AVX implementations.
Signed-off-by: Pablo de Lara <pabl
erasure_code: check for size on gf_vect_mul_sse/avx
gf_vect_mul requires length to be multiple of 32 bytes, so this check is added in the SSE/AVX implementations.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| 27597715 | 10-Jan-2024 |
liuqinfei <lucas.liuqinfei@huawei.com> |
gf_vect_mul_sve: fix error and enable unit tests for aarch64
Signed-off-by: liuqinfei <lucas.liuqinfei@huawei.com> |
| e0fffbe4 | 02-Jan-2024 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: disable unit tests temporarily for aarch64/ppc64le
Some aarch64 and ppc64le implementations of gf_vect_mul do not check for invalid sizes, so the unit test checking for negative return
erasure_code: disable unit tests temporarily for aarch64/ppc64le
Some aarch64 and ppc64le implementations of gf_vect_mul do not check for invalid sizes, so the unit test checking for negative return value from this function is disabled temporarily on these architectures.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| 455fdded | 15-Dec-2023 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: add missing aarch64 and powerpc interface for ec_init_tables
ec_init_tables is now a multi-implementation function, so it requires a dispatcher for all architectures.
Signed-off-by: P
erasure_code: add missing aarch64 and powerpc interface for ec_init_tables
ec_init_tables is now a multi-implementation function, so it requires a dispatcher for all architectures.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| 402bd4f7 | 18-Dec-2023 |
Tomasz Kantecki <tomasz.kantecki@intel.com> |
erasure_code: various fixes for static code analysis issues
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com> |
| a3e26043 | 15-Dec-2023 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: [test] fix memory leak
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> |
| abd80d3c | 15-Dec-2023 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
erasure_code: check for size in gf_Xvect_mad_avx512_gfni
Length of data was not checked in implementation with AVX512+GFNI, at the start of the gf_Xvect_mad_avx512_gfni functions, resulting in buffe
erasure_code: check for size in gf_Xvect_mad_avx512_gfni
Length of data was not checked in implementation with AVX512+GFNI, at the start of the gf_Xvect_mad_avx512_gfni functions, resulting in buffer overflow if length was less than 64 bytes.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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| 561a419b | 14-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: fix modules using incorrect unsigned jump
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| a53a20ea | 13-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add AVX2 5vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 47ed2847 | 13-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add AVX2 4vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 22b7f33d | 13-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add AVX2 3vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| d22bb198 | 08-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: optimize AVX2-GFNI single vector mad implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| a0a149d6 | 08-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add AVX2 2vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 0052080f | 08-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: optimize AVX2 GFNI 2 vector dot product
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 3f87141d | 07-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: optimize AVX2 GFNI single vector dot product
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 164d9ff1 | 06-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add 2 vector AVX2 dot product with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 307d737b | 05-Dec-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add 3 vector AVX2 dot product with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |
| 2ca781df | 29-Nov-2023 |
Pablo de Lara <pablo.de.lara.guarch@intel.com> |
lib: reduce verbosity by default in tests
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> |
| 5f23c034 | 30-Nov-2023 |
Marcel Cornu <marcel.d.cornu@intel.com> |
erasure_code: add initial AVX2 mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com> |