16828 Support AMD DFv4+ UMC decoding
Reviewed by: Rich Lowe <richlowe@richlowe.net>
Reviewed by: C Fraire <cfraire@me.com>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDonald

16828 Support AMD DFv4+ UMC decoding
Reviewed by: Rich Lowe <richlowe@richlowe.net>
Reviewed by: C Fraire <cfraire@me.com>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDonald <danmcd@mnx.io>

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16808 DF_MMIO_EXT_V4_SET_ macros incorrect
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Toomas Soome <tsoome@me.com>
Approved by: Robert Mustacchi <rm@fingolfin.org>

16702 CCM wide mode bit moved from DF::CCMConfig4 to DF::CCDEnable in DFv4D2
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDona

16702 CCM wide mode bit moved from DF::CCMConfig4 to DF::CCDEnable in DFv4D2
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDonald <danmcd@mnx.io>

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16701 want df register validation function
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

16668 Add field setter macros for AMD DF::MmioPciCfg{Base,Limit}Addr{,Ext}
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Approved by: Gordon Ross <

16668 Add field setter macros for AMD DF::MmioPciCfg{Base,Limit}Addr{,Ext}
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

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16667 Add AMD DF::SpecialSysFunctionFabricID1/2 register definitions.
Reviewed by: Rich Lowe <richlowe@richlowe.net>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Approved by: Gordon Ross <gordon.

16667 Add AMD DF::SpecialSysFunctionFabricID1/2 register definitions.
Reviewed by: Rich Lowe <richlowe@richlowe.net>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

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16587 AMD Zen DFv4D2: Fix register offset and destination FabricID bit-field widths.
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Da

16587 AMD Zen DFv4D2: Fix register offset and destination FabricID bit-field widths.
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDonald <danmcd@mnx.io>

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16559 zen_umc maps raw DFv4 IntLvNumChan value (NPS2 4CH) to the wrong df_chan_ileave value (COD2 4CH)
16560 add constant definition for DF::MmioExtAddress shift
Reviewed by: Dan Cross <cross@oxideco

16559 zen_umc maps raw DFv4 IntLvNumChan value (NPS2 4CH) to the wrong df_chan_ileave value (COD2 4CH)
16560 add constant definition for DF::MmioExtAddress shift
Reviewed by: Dan Cross <cross@oxidecomputer.com>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Dan McDonald <danmcd@mnx.io>

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16407 Raphael DF revision detection is incorrect
16405 initial amdzen family 1ah and cpuid support
16406 zen topo should tolerate missing revision or ppin info
Reviewed by: Andy Fiddaman <illumos@fid

16407 Raphael DF revision detection is incorrect
16405 initial amdzen family 1ah and cpuid support
16406 zen topo should tolerate missing revision or ppin info
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Reviewed by: Luqman Aden <luqman@oxide.computer>
Approved by: Richard Lowe <richlowe@richlowe.net>

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16244 DFv4 DRAM Offset register is incorrect
16245 Remove phoenix zen_umc support for now
Reviewed by: Keith Wesolowski <wesolows@oxide.computer>
Approved by: Dan McDonald <danmcd@mnx.io>

16132 want DF_COMPCNT_V4 typo fix
Reviewed by: Robert Mustacchi <rm+illumos@fingolfin.org>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

15951 want Zen specific CPU topology mapping
15952 want way of exposing AMD SoC topology to userland
15953 /dev/fm should support cache information
15954 snapshot new AMD CPUID topology leaves
15955

15951 want Zen specific CPU topology mapping
15952 want way of exposing AMD SoC topology to userland
15953 /dev/fm should support cache information
15954 snapshot new AMD CPUID topology leaves
15955 want more convenient topo module API for setting properties
Reviewed by: Keith Wesolowski <wesolows@oxide.computer>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

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14925 plumb DFv4 into amdzen(4D)
Reviewed by: Keith M Wesolowski <wesolows@oxide.computer>
Reviewed by: Andy Fiddaman <illumos@fiddaman.net>
Approved by: Garrett D'Amore <garrett@damore.org>

14727 Want AMD Unified Memory Controller Driver
Reviewed by: Keith M Wesolowski <wesolows@oxide.computer>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Reviewed by: C Fraire <cfraire@me.com>
Appr

14727 Want AMD Unified Memory Controller Driver
Reviewed by: Keith M Wesolowski <wesolows@oxide.computer>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Reviewed by: C Fraire <cfraire@me.com>
Approved by: Garrett D'Amore <garrett@damore.org>

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