pipeline: support hash functions

Add support for hash functions that compute a signature for an array
of bytes read from a packet header or meta-data. Useful for flow
affinity-based load balancing.

pipeline: support hash functions

Add support for hash functions that compute a signature for an array
of bytes read from a packet header or meta-data. Useful for flow
affinity-based load balancing.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: improve learner table timers

Enable the pipeline to use the improved learner table timer operation
through the new "rearm" instruction.

Signed-off-by: Cristian Dumitrescu <cristian.dumitr

pipeline: improve learner table timers

Enable the pipeline to use the improved learner table timer operation
through the new "rearm" instruction.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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table: improve learner table timers

Previously, on lookup hit, the hit key had its timer automatically
rearmed with the same timeout in order to prevent its expiration. Now,
a broader set of actions

table: improve learner table timers

Previously, on lookup hit, the hit key had its timer automatically
rearmed with the same timeout in order to prevent its expiration. Now,
a broader set of actions is available on lookup hit, which has to be
managed explicitly: the key can have its timer rearmed with the same
or with a different timeout, or the key timer can be left unmodified.
The latter option allows the key to expire naturally when the timer
eventually runs out, unless the key is hit again and its timer rearmed
at that point. Needed by the TCP connection tracking state machine.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support packet recirculation

Add support for packet recirculation. The current packet is flagged
for recirculation using the new "recirculate" instruction; on TX, this
flag causes the pack

pipeline: support packet recirculation

Add support for packet recirculation. The current packet is flagged
for recirculation using the new "recirculate" instruction; on TX, this
flag causes the packet to execute the full pipeline again as if it was
a new packet, except the packet meta-data is preserved. The new
"recircid" instruction can be used to read the pass number in case the
packet goes several times through the pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support packet mirroring

The packet mirroring is configured through slots and sessions, with
the number of slots and sessions set at init.

The new "mirror" instruction assigns one of the

pipeline: support packet mirroring

The packet mirroring is configured through slots and sessions, with
the number of slots and sessions set at init.

The new "mirror" instruction assigns one of the existing sessions to a
specific slot, which results in scheduling a mirror operation for the
current packet to be executed later at the time the packet is either
transmitted or dropped.

Several copies of the same input packet can be mirrored to different
output ports by using multiple slots.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: support default action arguments

Add support for arguments to the default action of regular and learner
tables at initialization time. Until now, only default actions with no
arguments wer

pipeline: support default action arguments

Add support for arguments to the default action of regular and learner
tables at initialization time. Until now, only default actions with no
arguments were accepted in the .spec file.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>

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lib: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>

pipeline: support checksum for variable size headers

Added checksum support for variable size headers such as IPv4 headers
with options.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@inte

pipeline: support checksum for variable size headers

Added checksum support for variable size headers such as IPv4 headers
with options.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>

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pipeline: fix table state memory allocation

The regular tables, selector tables and learner tables are all sharing
the table state array. The locations in this array were computed
incorrectly, leadi

pipeline: fix table state memory allocation

The regular tables, selector tables and learner tables are all sharing
the table state array. The locations in this array were computed
incorrectly, leading to memory corruption issues.

Fixes: 4f59d3726147 ("pipeline: support learner tables")
Cc: stable@dpdk.org

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>

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pipeline: add check against loops

Detect when a jump instruction, either conditional or unconditional,
is jumping to itself, thus creating a loop, which is not allowed in
data plane code.

Signed-of

pipeline: add check against loops

Detect when a jump instruction, either conditional or unconditional,
is jumping to itself, thus creating a loop, which is not allowed in
data plane code.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>

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pipeline: add drop port for each pipeline

An additional output port is now implicitly created for every pipeline
to serve as the packet drop port. Up to now, the drop port had to be
explicitly creat

pipeline: add drop port for each pipeline

An additional output port is now implicitly created for every pipeline
to serve as the packet drop port. Up to now, the drop port had to be
explicitly created for each pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>

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pipeline: move table type registration to library

Move the table type registration for the well known table types from
the application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <c

pipeline: move table type registration to library

Move the table type registration for the well known table types from
the application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>

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pipeline: move port type registration to library

Move the port type registration for the well known port types from the
application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <cris

pipeline: move port type registration to library

Move the port type registration for the well known port types from the
application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>

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pipeline: improve drop instruction

The output port to be used as the drop port is now determined when the
drop instruction is executed as opposed to being statically determined
at instruction transl

pipeline: improve drop instruction

The output port to be used as the drop port is now determined when the
drop instruction is executed as opposed to being statically determined
at instruction translation time and hardcoded in the opcode.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>

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pipeline: remove unreachable branch

A previous change blamed it on compiler/ASan, while this is a real
(yet minor) issue.

This return -EINVAL is never reached since we test all combinations of
fidx

pipeline: remove unreachable branch

A previous change blamed it on compiler/ASan, while this is a real
(yet minor) issue.

This return -EINVAL is never reached since we test all combinations of
fidx and fcin booleans.
All branches end up with a return 0, factorize them.

Fixes: 84f5ac9418ea ("pipeline: fix build with ASan")
Fixes: f38913b7fb8e ("pipeline: add meter array to SWX")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix dead code

Fix minor dead code issue reported by Coverity.

Coverity issue: 373653
Fixes: e9d870 ("pipeline: add SWX pipeline tables")

Signed-off-by: Yogesh Jangra <yogesh.jangra@intel

pipeline: fix dead code

Fix minor dead code issue reported by Coverity.

Coverity issue: 373653
Fixes: e9d870 ("pipeline: add SWX pipeline tables")

Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix build with ASan

Code changes to avoid the following build error:
"Control reaches end of non-void function".

Signed-off-by: Xueqin Lin <xueqin.lin@intel.com>
Signed-off-by: Zhihong Pe

pipeline: fix build with ASan

Code changes to avoid the following build error:
"Control reaches end of non-void function".

Signed-off-by: Xueqin Lin <xueqin.lin@intel.com>
Signed-off-by: Zhihong Peng <zhihongx.peng@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support action annotations

Enable restricting the scope of an action to regular table entries or
to the table default entry in order to support the P4 language
tableonly or defaultonly ann

pipeline: support action annotations

Enable restricting the scope of an action to regular table entries or
to the table default entry in order to support the P4 language
tableonly or defaultonly annotations.

Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix instruction label check

The instruction_data array was incorrectly indexed, which resulted in
the array index getting out of bounds and sometimes segfault.

Fixes: a1711f (“pipeline: a

pipeline: fix instruction label check

The instruction_data array was incorrectly indexed, which resulted in
the array index getting out of bounds and sometimes segfault.

Fixes: a1711f (“pipeline: add SWX Rx and extract instructions“)
Cc: stable@dpdk.org

Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: improve handling of learner action arguments

The arguments of actions that are learned are now specified as part of
the learn instruction as opposed to being statically specified as part
o

pipeline: improve handling of learner action arguments

The arguments of actions that are learned are now specified as part of
the learn instruction as opposed to being statically specified as part
of the learner table configuration.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: enable pipeline compilation

Commit the pipeline changes when the compilation process is
successful: change the table lookup instructions to execute the action
function for each action, rep

pipeline: enable pipeline compilation

Commit the pipeline changes when the compilation process is
successful: change the table lookup instructions to execute the action
function for each action, replace the regular pipeline instructions
with the custom instructions.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: build shared object for pipeline

Build the generated C file into a shared object library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Cunming Liang <

pipeline: build shared object for pipeline

Build the generated C file into a shared object library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Cunming Liang <cunming.liang@intel.com>

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pipeline: generate custom instruction functions

Generate a C function for each custom instruction, which essentially
consolidate multiple regular instructions into a single function call.
The pipeli

pipeline: generate custom instruction functions

Generate a C function for each custom instruction, which essentially
consolidate multiple regular instructions into a single function call.
The pipeline program is split into groups of instructions, and a
custom instruction is generated for each group that has more than one
instruction. Special care is taken the instructions that can do thread
yield (RX, extern) and for those that can change the instruction
pointer (TX, near/far jump).

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: generate action functions

Generate a C function for each action. For most instructions, the
associated inline function is called directly. Special care is taken
for TX, jump and return ins

pipeline: generate action functions

Generate a C function for each action. For most instructions, the
associated inline function is called directly. Special care is taken
for TX, jump and return instructions.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: export pipeline instructions to file

Export the array of translated instructions to a C file. There is one
such array per action and one for the pipeline.

Signed-off-by: Cristian Dumitres

pipeline: export pipeline instructions to file

Export the array of translated instructions to a C file. There is one
such array per action and one for the pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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