pipeline: optimize IPv4/IPv6 address conversion

Enhanced the move instruction to detect and optimize the conversion
between 128-bit numbers (IPv6 addresses) and 64-bit (upper or lower
part of IPv6 a

pipeline: optimize IPv4/IPv6 address conversion

Enhanced the move instruction to detect and optimize the conversion
between 128-bit numbers (IPv6 addresses) and 64-bit (upper or lower
part of IPv6 addresses) or 32-bit numbers (IPv4 addresses).

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: add instruction for IPv6 address upper half

Added new instruction called "movh" to read/write the upper half of an
IPv6 address, i.e. bits 127-64 of a 128-bit field.

Signed-off-by: Cristi

pipeline: add instruction for IPv6 address upper half

Added new instruction called "movh" to read/write the upper half of an
IPv6 address, i.e. bits 127-64 of a 128-bit field.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: remove limitation on number of input ports

Removed the requirement that the number of pipeline input ports be a
power of 2, which is problematic for many real life use-cases. Also
adding c

pipeline: remove limitation on number of input ports

Removed the requirement that the number of pipeline input ports be a
power of 2, which is problematic for many real life use-cases. Also
adding checks for the output port validity used for sending the
current packet.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix double free for table stats

The pointer to the table statistics data structure needs to be set
to NULL after free inside the table_build_free(), as this function is
called from multipl

pipeline: fix double free for table stats

The pointer to the table statistics data structure needs to be set
to NULL after free inside the table_build_free(), as this function is
called from multiple places, leading to double memory free error.

Similar fix for the learner_build_free() function.

Fixes: 742b0a57f50e ("pipeline: add table statistics to SWX")
Fixes: 4f59d3726147 ("pipeline: support learner tables")
Cc: stable@dpdk.org

Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support conversion between big and small fields

While the small fields (size <= 64 bits) can be in either network byte
order (header fields) or host byte order (meta-data fields), the big

pipeline: support conversion between big and small fields

While the small fields (size <= 64 bits) can be in either network byte
order (header fields) or host byte order (meta-data fields), the big
fields (size > 64 bits) are always expected to be in network byte
order (big endian), both header and metadata fields.

Previously, a big field could be involved in an assignment only when
both the destination and the source are big fields of exactly the same
size. This restriction is now relaxed significantly: in case a big
field is involved as either destination or source, the other field can
now be either a big field (of the same or different size) or a small
header field, so in either case both destination and source are in the
network byte order.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: add RSS

Add pipeline support for the Receive Side Scaling (RSS) hashing. While
the pipeline already supports the stateless hashing schemes, the RSS
scheme uses a key configured by the cont

pipeline: add RSS

Add pipeline support for the Receive Side Scaling (RSS) hashing. While
the pipeline already supports the stateless hashing schemes, the RSS
scheme uses a key configured by the control plane and preserved
between successive RSS hash invocations.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: fix validate header instruction

The exported data structure for the header validate instruction did
not populate its struct_id field, which results in segmentation fault.

Fixes: 216bc906d

pipeline: fix validate header instruction

The exported data structure for the header validate instruction did
not populate its struct_id field, which results in segmentation fault.

Fixes: 216bc906d00 ("pipeline: export pipeline instructions to file")
Cc: stable@dpdk.org

Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support direct meters on control path

Add pipeline control path API to manage direct meters. These meters
are identified by a table key, whose entry ID is used as the index
into the meter

pipeline: support direct meters on control path

Add pipeline control path API to manage direct meters. These meters
are identified by a table key, whose entry ID is used as the index
into the meter array.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: support direct registers on control path

Add pipeline control path API to read/write direct registers. These
registers are identified by a table key, whose entry ID is used as the
index in

pipeline: support direct registers on control path

Add pipeline control path API to read/write direct registers. These
registers are identified by a table key, whose entry ID is used as the
index into the register array.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: add table entry ID read instruction

Add the entry ID instruction that reads the entry ID of the latest
table lookup operation from the pipeline into the meta-data. The entry
ID is then use

pipeline: add table entry ID read instruction

Add the entry ID instruction that reads the entry ID of the latest
table lookup operation from the pipeline into the meta-data. The entry
ID is then used by the register and meter instructions as the index
into the register or meter array.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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table: add entry ID for learner tables

Add support for unique ID for each learner table entry. The entry ID
is retrieved as part of the learner table lookup operation and is
saved by the pipeline fo

table: add entry ID for learner tables

Add support for unique ID for each learner table entry. The entry ID
is retrieved as part of the learner table lookup operation and is
saved by the pipeline for later use.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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table: add entry ID for regular tables

Add support for unique ID for each table entry. The entry ID is
retrieved as part of the table lookup operation and is saved by the
pipeline for later use.

Si

table: add entry ID for regular tables

Add support for unique ID for each table entry. The entry ID is
retrieved as part of the table lookup operation and is saved by the
pipeline for later use.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: configure hash function for learner tables

Make the hash function configurable for the learner pipeline tables.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-o

pipeline: configure hash function for learner tables

Make the hash function configurable for the learner pipeline tables.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: configure hash function for regular tables

Make the hash function configurable for the regular pipeline tables.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-o

pipeline: configure hash function for regular tables

Make the hash function configurable for the regular pipeline tables.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: support moving large structure fields

Add support to the move instruction for operands bigger than 64 bits.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-b

pipeline: support moving large structure fields

Add support to the move instruction for operands bigger than 64 bits.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>

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pipeline: support large default action arguments

Support structure fields bigger than 64 bits as default action
arguments.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-

pipeline: support large default action arguments

Support structure fields bigger than 64 bits as default action
arguments.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>

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pipeline: remove 64-bit limit for structure fields

Remove the generic limitation of structure fields to 64 bits or less
and push this restriction to the instructions that require it.

Signed-off-by:

pipeline: remove 64-bit limit for structure fields

Remove the generic limitation of structure fields to 64 bits or less
and push this restriction to the instructions that require it.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>

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pipeline: add API for shared library-based pipeline build

Previously, the pipeline build operation was done based on the
specification file (typically produced by the P4 compiler), then the C
code w

pipeline: add API for shared library-based pipeline build

Previously, the pipeline build operation was done based on the
specification file (typically produced by the P4 compiler), then the C
code with optimized functions for the pipeline actions and
instructions was generated, built into a shared object library, loaded
and installed into the pipeline in a completely hardcoded and
non-customizable way.

Now, this process is split into three explicit stages:
i) code generation (specification file -> C file);
ii) code build (C file -> shared object library);
iii) code installation (library load into the pipeline).

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: add API for code generation

Previously, the C code generation for the pipeline was hidden under
the hood; now, we make this an explicit API operation. Besides the
functions for the pipelin

pipeline: add API for code generation

Previously, the C code generation for the pipeline was hidden under
the hood; now, we make this an explicit API operation. Besides the
functions for the pipeline actions and the pipeline instructions,
the generated C source code now includes the pipeline specification
structure required for the pipeline configuration operations.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: add pipeline name

Add an unique name to every pipeline. This enables the library to
maintain a list of the existing pipeline objects, which can be
queried by the application.

Signed-off-b

pipeline: add pipeline name

Add an unique name to every pipeline. This enables the library to
maintain a list of the existing pipeline objects, which can be
queried by the application.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>

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pipeline: fix code generation for recirculation ID

The "offset" and "n_bits" fields were generated incorrectly, hence the
output C file was producing compilation errors when the "recircid"
instructi

pipeline: fix code generation for recirculation ID

The "offset" and "n_bits" fields were generated incorrectly, hence the
output C file was producing compilation errors when the "recircid"
instruction was used.

Fixes: 5ec76d29dc6 ("pipeline: support packet recirculation")
Cc: stable@dpdk.org

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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remove unnecessary null checks

Found by nullfree.cocci.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
[David: for lpm parts:]
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-

remove unnecessary null checks

Found by nullfree.cocci.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
[David: for lpm parts:]
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
[David: for vdpa/mlx5 parts:]
Acked-by: Matan Azrad <matan@nvidia.com>
[David: for dma/dpaa2, raw/ifpga, vdpa/mlx5:]
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
[David: reran cocci.sh and updated common/mlx5 and cryptodev asym test]
Signed-off-by: David Marchand <david.marchand@redhat.com>

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pipeline: rework optimization pattern for header generation

The P4 language requires marking a header as valid before any of the
header fields are written as opposed to after the writes are done.
He

pipeline: rework optimization pattern for header generation

The P4 language requires marking a header as valid before any of the
header fields are written as opposed to after the writes are done.
Hence, the optimization of replacing the sequence of instructions to
generate a header by reading it from the table action data with a
single DMA internal instruction are reworked from "mov all + validate
-> dma" to "validate + mov all -> dma".

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix check maximum learner table timeouts

Fix comparison used to check against the maximum number of learner
table timeouts.

Fixes: e2ecc53582fb ("pipeline: improve learner table timers")

pipeline: fix check maximum learner table timeouts

Fix comparison used to check against the maximum number of learner
table timeouts.

Fixes: e2ecc53582fb ("pipeline: improve learner table timers")

Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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pipeline: fix packet mirroring configuration

Fix segmentation fault due to null pointer dereferencing inside the
"mirror" instruction when number of mirroring slots is set to 0. This
was taking plac

pipeline: fix packet mirroring configuration

Fix segmentation fault due to null pointer dereferencing inside the
"mirror" instruction when number of mirroring slots is set to 0. This
was taking place when the "mirror" instruction was used without the
mirror feature being properly configured, i.e. the API function
rte_swx_pipeline_mirroring_config was not called at initialization.

Fixes: dac0ecd9098 ("pipeline: support packet mirroring")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

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