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Searched refs:ref_clock (Results 1 – 8 of 8) sorted by relevance

/openbsd-src/sys/dev/pci/drm/i915/display/
H A Dintel_dpll_mgr.c1492 int ref_clock, in skl_wrpll_params_populate() argument
1552 params->dco_integer = div_u64(dco_freq, ref_clock * KHz(1)); in skl_wrpll_params_populate()
1554 div_u64((div_u64(dco_freq, ref_clock / KHz(1)) - in skl_wrpll_params_populate()
1560 int ref_clock, in skl_ddi_calculate_wrpll() argument
1624 skl_wrpll_params_populate(wrpll_params, afe_clock, ref_clock, in skl_ddi_calculate_wrpll()
1634 int ref_clock = i915->display.dpll.ref_clks.nssc; in skl_ddi_wrpll_get_freq() local
1690 ref_clock; in skl_ddi_wrpll_get_freq()
1693 ref_clock / 0x8000; in skl_ddi_wrpll_get_freq()
2630 int ref_clock = i915->display.dpll.ref_clks.nssc; in icl_wrpll_ref_clock() local
2636 if (ref_clock in icl_wrpll_ref_clock()
2647 int ref_clock = icl_wrpll_ref_clock(i915); icl_calc_wrpll() local
2690 int ref_clock = icl_wrpll_ref_clock(i915); icl_ddi_combo_pll_get_freq() local
3060 u32 m1, m2_int, m2_frac, div1, div2, ref_clock; icl_ddi_mg_pll_get_freq() local
[all...]
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c725 uint32_t ref_clock; in vegam_calculate_sclk_params() local
749 ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in vegam_calculate_sclk_params()
761 ref_clock); in vegam_calculate_sclk_params()
764 do_div(temp, ref_clock); in vegam_calculate_sclk_params()
771 ref_clock); in vegam_calculate_sclk_params()
780 ref_clock); in vegam_calculate_sclk_params()
783 do_div(temp, ref_clock); in vegam_calculate_sclk_params()
H A Dpolaris10_smumgr.c896 uint32_t ref_clock; in polaris10_calculate_sclk_params() local
920 ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in polaris10_calculate_sclk_params()
930 …_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
933 do_div(temp, ref_clock); in polaris10_calculate_sclk_params()
938 …nt16_t)((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
945 …int16_t)((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
948 do_div(temp, ref_clock); in polaris10_calculate_sclk_params()
H A Dfiji_smumgr.c865 uint32_t ref_clock; in fiji_calculate_sclk_params() local
878 ref_clock = atomctrl_get_reference_clock(hwmgr); in fiji_calculate_sclk_params()
911 uint32_t clk_s = ref_clock * 5 / in fiji_calculate_sclk_params()
H A Dci_smumgr.c307 uint32_t ref_clock; in ci_calculate_sclk_params() local
320 ref_clock = atomctrl_get_reference_clock(hwmgr); in ci_calculate_sclk_params()
347 uint32_t clk_s = ref_clock * 5 / in ci_calculate_sclk_params()
/openbsd-src/sys/dev/pci/drm/radeon/
H A Drv6xx_dpm.c525 static inline u32 rv6xx_calculate_vco_frequency(u32 ref_clock, in rv6xx_calculate_vco_frequency() argument
529 return ref_clock * ((dividers->fb_div & ~1) << fb_divider_scale) / in rv6xx_calculate_vco_frequency()
H A Dci_dpm.c1953 u32 ref_clock = rdev->clock.spll.reference_freq; in ci_program_display_gap() local
1971 tmp = pre_vbi_time_in_us * (ref_clock / 100); in ci_program_display_gap()
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4581 uint32_t ref_clock, refresh_rate; in smu7_program_display_gap()
4586 ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in smu7_program_display_gap()
4603 display_gap2 = pre_vbi_time_in_us * (ref_clock / 100); in smu7_program_display_gap()
4580 uint32_t ref_clock, refresh_rate; smu7_program_display_gap() local