| /netbsd-src/sys/arch/hp300/stand/common/ |
| H A D | grf_dvreg.h | 53 vu_char red;
55 vu_char green;
57 vu_char blue;
62 vu_char reset; /* reset register 0x01 */
64 vu_char interrupt; /* interrupt register 0x03 */
66 vu_char fbwmsb; /* frame buffer width MSB 0x05 */
68 vu_char fbwlsb; /* frame buffer width MSB 0x07 */
70 vu_char fbhmsb; /* frame buffer height MSB 0x09 */
72 vu_char fbhlsb; /* frame buffer height MSB 0x0b */
74 vu_char dwmsb; /* display width MSB 0x0d */
[all …]
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| H A D | grf_gbreg.h | 65 vu_char reset; /* reset register 0x01 */
66 vu_char sec_interrupt; /* Secondary interrupt register 0x03 */
67 vu_char interrupt; /* interrupt register 0x03 */
69 vu_char fbwmsb; /* frame buffer width MSB 0x05 */
71 vu_char fbwlsb; /* frame buffer width MSB 0x07 */
73 vu_char fbhmsb; /* frame buffer height MSB 0x09 */
75 vu_char fbhlsb; /* frame buffer height MSB 0x0b */
77 vu_char dwmsb; /* display width MSB 0x0d */
79 vu_char dwlsb; /* display width MSB 0x0f */
81 vu_char dhmsb; /* display height MSB 0x11 */
[all …]
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| H A D | grf_tcreg.h | 51 vu_char reset; /* reset register 0x01 */
52 vu_char fb_address; /* frame buffer address 0x02 */
53 vu_char interrupt; /* interrupt register 0x03 */
55 vu_char fbwmsb; /* frame buffer width MSB 0x05 */
57 vu_char fbwlsb; /* frame buffer width MSB 0x07 */
59 vu_char fbhmsb; /* frame buffer height MSB 0x09 */
61 vu_char fbhlsb; /* frame buffer height MSB 0x0b */
63 vu_char dwmsb; /* display width MSB 0x0d */
65 vu_char dwlsb; /* display width MSB 0x0f */
67 vu_char dhmsb; /* display height MSB 0x11 */
[all …]
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| H A D | grf_rbreg.h | 59 vu_char value;
64 vu_char reset; /* reset register 0x01 */
65 vu_char fb_address; /* frame buffer address 0x02 */
66 vu_char interrupt; /* interrupt register 0x03 */
68 vu_char fbwmsb; /* frame buffer width MSB 0x05 */
70 vu_char fbwlsb; /* frame buffer width MSB 0x07 */
72 vu_char fbhmsb; /* frame buffer height MSB 0x09 */
74 vu_char fbhlsb; /* frame buffer height MSB 0x0b */
76 vu_char dwmsb; /* display width MSB 0x0d */
78 vu_char dwlsb; /* display width MSB 0x0f */
[all …]
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| H A D | grf_hyreg.h | 46 vu_char reset; /* reset register 0x01 */
47 vu_char fb_address; /* frame buffer address 0x02 */
48 vu_char interrupt; /* interrupt register 0x03 */
50 vu_char fbwmsb; /* frame buffer width MSB 0x05 */
52 vu_char fbwlsb; /* frame buffer width MSB 0x07 */
54 vu_char fbhmsb; /* frame buffer height MSB 0x09 */
56 vu_char fbhlsb; /* frame buffer height MSB 0x0b */
58 vu_char dwmsb; /* display width MSB 0x0d */
60 vu_char dwlsb; /* display width MSB 0x0f */
62 vu_char dhmsb; /* display height MSB 0x11 */
[all …]
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| H A D | dcareg.h | 38 vu_char dca_reset;
39 vu_char dca_pad[0x800-1];
40 vu_char dca_data; /* receive buf or xmit hold */
41 vu_char dca_ier; /* interrupt enable */
42 vu_char dca_iir; /* (RO) interrupt identify */
44 vu_char dca_cfcr; /* line control */
45 vu_char dca_mcr; /* modem control */
46 vu_char dca_lsr; /* line status */
47 vu_char dca_msr; /* modem status */
48 vu_char dca_scr; /* scratch pad */
[all …]
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| H A D | apcireg.h | 31 vu_char ap_data;
33 vu_char ap_ier;
35 vu_char ap_iir;
38 vu_char ap_cfcr;
40 vu_char ap_mcr;
42 vu_char ap_lsr;
44 vu_char ap_msr;
46 vu_char ap_scratch;
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| H A D | hilreg.h | 46 vu_char hil_data;
48 vu_char hil_cmd;
58 vu_char hil_rsthold; /* (WO) reset hold (and Serial #3) */
59 vu_char hil_resv1[2047];
60 vu_char hil_data; /* send/receive data to/from 8042 */
61 vu_char hil_cmd; /* status/control to/from 8042 */
62 vu_char hil_resv2[1022];
63 vu_char hil_rstrel; /* (WO) reset release (and Serial #3) */
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| H A D | if_lereg.h | 42 #define vu_char volatile u_char macro
50 vu_char ler0_id; /* ID */
52 vu_char ler0_status; /* interrupt enable/status */
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| /netbsd-src/sys/arch/hp300/dev/ |
| H A D | dcmreg.h | 45 vu_char dcm_rsid; /* Reset / ID 0001 */
47 vu_char dcm_ic; /* Interrupt control register 0003 */
49 vu_char dcm_sem; /* Semaphore register 0005 */
52 vu_char dcm_iir; /* Interrupt ident register 8001 */
54 vu_char dcm_cr; /* Command register 8003 */
58 vu_char data_char;
60 vu_char data_stat;
64 vu_char data_data;
68 vu_char ptr;
72 vu_char ptr;
[all …]
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| H A D | fhpibreg.h | 38 vu_char hpib_cid;
41 vu_char hpib_ids;
43 vu_char hpib_ctrl2;
45 vu_char hpib_latch;
47 vu_char hpib_intr;
49 vu_char hpib_imask;
51 vu_char hpib_data;
53 vu_char hpib_stat;
55 vu_char hpib_cmd;
57 vu_char hpib_ar;
[all …]
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| H A D | nhpibreg.h | 38 vu_char hpib_cid;
41 vu_char hpib_ids;
43 vu_char hpib_csa;
46 vu_char hpib_mis;
49 vu_char hpib_lis;
51 vu_char hpib_is;
54 vu_char hpib_cls;
56 vu_char hpib_ar;
58 vu_char hpib_sprb;
61 vu_char hpib_cpt;
[all …]
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| H A D | iotypes.h | 48 typedef volatile unsigned char vu_char; typedef
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| /netbsd-src/sys/arch/acorn32/podulebus/ |
| H A D | escreg.h | 40 typedef volatile unsigned char vu_char; typedef
43 vu_char *esc_tc_low; /* rw: Transfer count low */
44 vu_char *esc_tc_mid; /* rw: Transfer count mid */
45 vu_char *esc_fifo; /* rw: Data FIFO */
46 vu_char *esc_command; /* rw: Chip command reg */
47 vu_char *esc_dest_id; /* w: (Re)select bus ID */
49 vu_char *esc_timeout; /* w: (Re)select timeout */
51 vu_char *esc_syncper; /* w: Synch. transfer period */
53 vu_char *esc_syncoff; /* w: Synch. transfer offset */
55 vu_char *esc_config1; /* rw: Config register #1 */
[all …]
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| H A D | sfasreg.h | 40 typedef volatile unsigned char vu_char; typedef
43 vu_char *sfas_tc_low; /* rw: Transfer count low */
44 vu_char *sfas_tc_mid; /* rw: Transfer count mid */
45 vu_char *sfas_fifo; /* rw: Data FIFO */
46 vu_char *sfas_command; /* rw: Chip command reg */
47 vu_char *sfas_dest_id; /* w: (Re)select bus ID */
49 vu_char *sfas_timeout; /* w: (Re)select timeout */
51 vu_char *sfas_syncper; /* w: Synch. transfer period */
53 vu_char *sfas_syncoff; /* w: Synch. transfer offset */
55 vu_char *sfas_config1; /* rw: Config register #1 */
[all …]
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| H A D | ptscreg.h | 46 vu_char *chipreset;
47 vu_char *inten;
48 vu_char *status;
49 vu_char *term;
50 vu_char *led;
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| H A D | coscreg.h | 49 vu_char *chipreset;
50 vu_char *inten;
51 vu_char *status;
52 vu_char *term;
53 vu_char *led;
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| H A D | cosc.c | 113 vu_char *esc; in coscattach()
128 sc->sc_iobase = (vu_char *)sc->sc_podule->fast_base; in coscattach()
134 rp->chipreset = (vu_char *)&dummy[0]; in coscattach()
135 rp->inten = (vu_char *)&dummy[1]; in coscattach()
136 rp->status = (vu_char *)&dummy[2]; in coscattach()
138 rp->led = (vu_char *)&dummy[4]; in coscattach()
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| H A D | cscreg.h | 45 vu_char *status0;
46 vu_char *alatch;
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| H A D | coscvar.h | 44 vu_char *sc_iobase;
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| H A D | ptscvar.h | 41 vu_char *sc_iobase;
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| /netbsd-src/sys/arch/amiga/dev/ |
| H A D | gtscreg.h | 43 #define vu_char volatile u_char macro
52 vu_char SASR;
54 vu_char SCMD;
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| H A D | atzscreg.h | 77 #define vu_char volatile u_char macro
94 vu_char SASR; /* sbic asr */
96 vu_char SCMD; /* sbic data */
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| H A D | ahscreg.h | 77 #define vu_char volatile u_char macro
100 vu_char SASR; /* sbic asr */
102 vu_char SCMD; /* sbic data */
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| H A D | ahsc.c | 162 sc->sc_sbic.sbic_asr_p = ((vu_char *)rp + 0x43); in ahscattach()
163 sc->sc_sbic.sbic_value_p = ((vu_char *)rp + 0x47); in ahscattach()
166 sc->sc_sbic.sbic_asr_p = ((vu_char *)rp + 0x41); in ahscattach()
167 sc->sc_sbic.sbic_value_p = ((vu_char *)rp + 0x43); in ahscattach()
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