| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_clocks.c | 47 struct radeon_pll *spll = &rdev->clock.spll; in radeon_legacy_get_engine_clock() local
53 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock()
116 struct radeon_pll *spll = &rdev->clock.spll; in radeon_read_clocks_OF() local
155 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF()
156 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()
191 struct radeon_pll *spll = &rdev->clock.spll; in radeon_get_clock_info() local
219 if (spll->reference_div < 2) in radeon_get_clock_info()
220 spll->reference_div = in radeon_get_clock_info()
225 mpll->reference_div = spll->reference_div; in radeon_get_clock_info()
238 spll->reference_freq = 1432; in radeon_get_clock_info()
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| H A D | radeon_combios.c | 744 struct radeon_pll *spll = &rdev->clock.spll; in radeon_combios_get_clock_info() local
771 spll->reference_freq = RBIOS16(pll_info + 0x1a); in radeon_combios_get_clock_info()
772 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()
773 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
774 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
777 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
778 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
781 spll->pll_in_min = 40; in radeon_combios_get_clock_info()
782 spll->pll_in_max = 500; in radeon_combios_get_clock_info()
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| H A D | radeon_atombios.c | 1143 struct radeon_pll *spll = &rdev->clock.spll; in radeon_atom_get_clock_info() local
1196 spll->reference_freq = in radeon_atom_get_clock_info()
1199 spll->reference_freq = in radeon_atom_get_clock_info()
1201 spll->reference_div = 0; in radeon_atom_get_clock_info()
1203 spll->pll_out_min = in radeon_atom_get_clock_info()
1205 spll->pll_out_max = in radeon_atom_get_clock_info()
1209 if (spll->pll_out_min == 0) { in radeon_atom_get_clock_info()
1211 spll->pll_out_min = 64800; in radeon_atom_get_clock_info()
1213 spll->pll_out_min = 20000; in radeon_atom_get_clock_info()
1216 spll->pll_in_min = in radeon_atom_get_clock_info()
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| H A D | radeon_rv6xx_dpm.c | 168 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping()
433 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay()
556 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum()
845 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_bsp()
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| H A D | radeon_rv740_dpm.c | 136 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value()
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| H A D | radeon_rs780_dpm.c | 998 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level()
1021 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk()
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| H A D | radeon_rv730_dpm.c | 56 u32 reference_clock = rdev->clock.spll.reference_freq; in rv730_populate_sclk_value()
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| H A D | radeon_kms.c | 345 *value = rdev->clock.spll.reference_freq * 10; in radeon_info_ioctl()
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| H A D | radeon_uvd.c | 976 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; in radeon_uvd_calc_upll_dividers()
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| H A D | radeon_rv770.c | 801 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_get_xclk()
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| H A D | radeon_ci_dpm.c | 1996 u32 ref_clock = rdev->clock.spll.reference_freq; in ci_program_display_gap()
3016 table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; in ci_populate_smc_acpi_level()
3175 u32 reference_clock = rdev->clock.spll.reference_freq; in ci_calculate_sclk_params()
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| H A D | radeon_r600.c | 207 return rdev->clock.spll.reference_freq; in r600_get_xclk()
234 if (rdev->clock.spll.reference_freq == 10000) in r600_set_uvd_clocks()
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| H A D | radeon_rv770_dpm.c | 505 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_populate_sclk_value()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_atomfirmware.c | 350 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atomfirmware_get_clock_info() local
388 spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
390 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
391 spll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
392 spll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
393 spll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
394 spll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
395 spll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()
396 spll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
397 spll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
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| H A D | amdgpu_atombios.c | 577 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atombios_get_clock_info() local
623 spll->reference_freq = in amdgpu_atombios_get_clock_info()
625 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()
627 spll->pll_out_min = in amdgpu_atombios_get_clock_info()
629 spll->pll_out_max = in amdgpu_atombios_get_clock_info()
633 if (spll->pll_out_min == 0) in amdgpu_atombios_get_clock_info()
634 spll->pll_out_min = 64800; in amdgpu_atombios_get_clock_info()
636 spll->pll_in_min = in amdgpu_atombios_get_clock_info()
638 spll->pll_in_max = in amdgpu_atombios_get_clock_info()
641 spll->min_post_div = 1; in amdgpu_atombios_get_clock_info()
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| H A D | amdgpu_nv.c | 138 return adev->clock.spll.reference_freq; in nv_get_xclk()
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| H A D | amdgpu.h | 338 struct amdgpu_pll spll; member
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| H A D | amdgpu_cik.c | 850 u32 reference_clock = adev->clock.spll.reference_freq; in cik_get_xclk()
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| H A D | amdgpu_vi.c | 336 u32 reference_clock = adev->clock.spll.reference_freq; in vi_get_xclk()
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| H A D | amdgpu_soc15.c | 282 u32 reference_clock = adev->clock.spll.reference_freq; in soc15_get_xclk()
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| H A D | amdgpu_si.c | 1239 u32 reference_clock = adev->clock.spll.reference_freq; in si_get_xclk()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| H A D | nouveau_nvkm_subdev_clk_nv40.c | 41 u32 spll; member
180 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
183 clk->spll = 0x00000000; in nv40_clk_calc()
198 nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll); in nv40_clk_prog()
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| H A D | nouveau_nvkm_subdev_clk_nv50.c | 479 clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
486 clk_mask(hwsq, spll[0], 0xc03f0100, in nv50_clk_calc()
488 clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M); in nv50_clk_calc()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_dpll_mgr.h | 179 u32 spll; member
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| H A D | intel_dpll_mgr.c | 522 I915_WRITE(SPLL_CTL, pll->state.hw_state.spll); in hsw_ddi_spll_enable()
597 hw_state->spll = val; in hsw_ddi_spll_get_hw_state()
899 crtc_state->dpll_hw_state.spll = in hsw_get_dpll()
924 hw_state->wrpll, hw_state->spll); in hsw_dump_hw_state()
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