Home
last modified time | relevance | path

Searched refs:num_se (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega10_powertune.c941 uint32_t num_se = 0, count, data; in vega10_enable_cac_driving_se_didt_config() local
943 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_cac_driving_se_didt_config()
948 for (count = 0; count < num_se; count++) { in vega10_enable_cac_driving_se_didt_config()
992 uint32_t num_se = 0, count, data; in vega10_enable_psm_gc_didt_config() local
994 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_didt_config()
999 for (count = 0; count < num_se; count++) { in vega10_enable_psm_gc_didt_config()
1053 uint32_t num_se = 0, count, data; in vega10_enable_se_edc_config() local
1055 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_se_edc_config()
1060 for (count = 0; count < num_se; count++) { in vega10_enable_se_edc_config()
1100 uint32_t num_se = 0; in vega10_enable_psm_gc_edc_config() local
[all …]
H A Damdgpu_smu7_powertune.c964 uint32_t num_se = 0; in smu7_enable_didt_config() local
968 num_se = adev->gfx.config.max_shader_engines; in smu7_enable_didt_config()
979 for (count = 0; count < num_se; count++) { in smu7_enable_didt_config()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v6_0.c1383 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v6_0_write_harvested_raster_configs() local
1384 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v6_0_write_harvested_raster_configs()
1385 unsigned rb_per_se = num_rb / num_se; in gfx_v6_0_write_harvested_raster_configs()
1394 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v6_0_write_harvested_raster_configs()
1398 for (se = 0; se < num_se; se++) { in gfx_v6_0_write_harvested_raster_configs()
1404 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v6_0_write_harvested_raster_configs()
H A Damdgpu_gfx.h129 uint8_t num_se; member
H A Damdgpu_gfx_v7_0.c1683 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v7_0_write_harvested_raster_configs() local
1684 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v7_0_write_harvested_raster_configs()
1685 unsigned rb_per_se = num_rb / num_se; in gfx_v7_0_write_harvested_raster_configs()
1694 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v7_0_write_harvested_raster_configs()
1698 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v7_0_write_harvested_raster_configs()
1711 for (se = 0; se < num_se; se++) { in gfx_v7_0_write_harvested_raster_configs()
1717 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v7_0_write_harvested_raster_configs()
H A Damdgpu_gfx_v8_0.c3513 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v8_0_write_harvested_raster_configs() local
3514 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v8_0_write_harvested_raster_configs()
3515 unsigned rb_per_se = num_rb / num_se; in gfx_v8_0_write_harvested_raster_configs()
3524 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v8_0_write_harvested_raster_configs()
3528 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v8_0_write_harvested_raster_configs()
3541 for (se = 0; se < num_se; se++) { in gfx_v8_0_write_harvested_raster_configs()
3547 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v8_0_write_harvested_raster_configs()
H A Damdgpu_gfx_v10_0.c1231 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()
H A Damdgpu_gfx_v9_0.c2118 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c3305 adev->gfx.config.gb_addr_config_fields.num_se; in fill_plane_buffer_attributes()