Searched refs:mmSDMA0_GFX_RB_BASE_HI (Results 1 – 14 of 14) sorted by relevance
210 #define mmSDMA0_GFX_RB_BASE_HI … macro
214 #define mmSDMA0_GFX_RB_BASE_HI 0x0082 macro
214 #define mmSDMA0_GFX_RB_BASE_HI … macro
191 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
218 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
250 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
343 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
469 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v2_4_gfx_resume()
490 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
708 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v3_0_gfx_resume()
675 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40); in sdma_v5_0_gfx_resume()
1121 WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE_HI, ring->gpu_addr >> 40); in sdma_v4_0_gfx_resume()
205 #define mmSDMA0_GFX_RB_BASE_HI … macro