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/netbsd-src/external/gpl3/gcc.old/dist/libphobos/libdruntime/gc/
H A Dproxy.d31 __gshared GC instance; variable
43 ManualGC.initialize(instance); in gc_init()
44 ConservativeGC.initialize(instance); in gc_init()
45 if (instance is null) in gc_init()
71 instance.collectNoStack(); // not really a 'collect all' -- still scans in gc_term()
76 ManualGC.finalize(instance); in gc_term()
77 ConservativeGC.finalize(instance); in gc_term()
82 instance.enable(); in gc_enable()
87 instance.disable(); in gc_disable()
92 instance.collect(); in gc_collect()
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/netbsd-src/sys/external/bsd/vchiq/dist/interface/vchiq_arm/
H A Dvchiq_kern_lib.c72 VCHIQ_INSTANCE_T instance = NULL; in vchiq_initialise() local
94 instance = kzalloc(sizeof(*instance), GFP_KERNEL); in vchiq_initialise()
95 if (!instance) { in vchiq_initialise()
101 instance->connected = 0; in vchiq_initialise()
102 instance->state = state; in vchiq_initialise()
103 lmutex_init(&instance->bulk_waiter_list_mutex); in vchiq_initialise()
104 INIT_LIST_HEAD(&instance->bulk_waiter_list); in vchiq_initialise()
106 *instanceOut = instance; in vchiq_initialise()
112 "%s(%p): returning %d", __func__, instance, status); in vchiq_initialise()
124 VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance) in vchiq_shutdown() argument
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H A Dvchiq_arm.c108 VCHIQ_INSTANCE_T instance; member
230 add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, in add_completion() argument
238 insert = instance->completion_insert; in add_completion()
239 while ((insert - instance->completion_remove) >= MAX_COMPLETIONS) { in add_completion()
246 if (down_interruptible(&instance->remove_event) != 0) { in add_completion()
252 if (instance->closing) { in add_completion()
260 completion = &instance->completions[insert & (MAX_COMPLETIONS - 1)]; in add_completion()
272 if (instance->use_close_delivered) in add_completion()
283 instance->completion_insert = ++insert; in add_completion()
285 up(&instance->insert_event); in add_completion()
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/netbsd-src/external/gpl3/gcc/dist/libphobos/libdruntime/core/internal/gc/
H A Dproxy.d30 GC instance() { return _instance; } in pragma()
59 auto protoInstance = instance; in gc_init()
116 instance.collectNoStack(); // not really a 'collect all' -- still scans in gc_term()
120 instance.runFinalizers((cast(ubyte*)null)[0 .. size_t.max]); in gc_term()
123 destroy(instance); in gc_term()
129 instance.enable(); in gc_enable()
134 instance.disable(); in gc_disable()
139 instance.collect(); in gc_collect()
144 instance.minimize(); in gc_minimize()
149 return instance.getAttr(p); in gc_getAttr()
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/netbsd-src/external/apache2/argon2/dist/phc-winner-argon2/src/
H A Dcore.c159 void finalize(const argon2_context *context, argon2_instance_t *instance) { in finalize() argument
160 if (context != NULL && instance != NULL) { in finalize()
164 copy_block(&blockhash, instance->memory + instance->lane_length - 1); in finalize()
167 for (l = 1; l < instance->lanes; ++l) { in finalize()
169 l * instance->lane_length + (instance->lane_length - 1); in finalize()
170 xor_block(&blockhash, instance->memory + last_block_in_lane); in finalize()
188 free_memory(context, (uint8_t *)instance->memory, in finalize()
189 instance->memory_blocks, sizeof(block)); in finalize()
193 uint32_t index_alpha(const argon2_instance_t *instance, in index_alpha() argument
220 position->slice * instance->segment_length + in index_alpha()
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H A Dref.c90 void fill_segment(const argon2_instance_t *instance, in fill_segment() argument
100 if (instance == NULL) { in fill_segment()
105 (instance->type == Argon2_i) || in fill_segment()
106 (instance->type == Argon2_id && (position.pass == 0) && in fill_segment()
116 input_block.v[3] = instance->memory_blocks; in fill_segment()
117 input_block.v[4] = instance->passes; in fill_segment()
118 input_block.v[5] = instance->type; in fill_segment()
133 curr_offset = position.lane * instance->lane_length + in fill_segment()
134 position.slice * instance->segment_length + starting_index; in fill_segment()
136 if (0 == curr_offset % instance->lane_length) { in fill_segment()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_arct_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in arct_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in arct_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in arct_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); in arct_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i])); in arct_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in arct_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in arct_reg_base_init()
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in arct_reg_base_init()
47 adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); in arct_reg_base_init()
48 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in arct_reg_base_init()
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H A Damdgpu_navi14_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i])); in navi14_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i])); in navi14_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i])); in navi14_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i])); in navi14_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIF0_BASE.instance[i])); in navi14_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i])); in navi14_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i])); in navi14_reg_base_init()
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(UVD0_BASE.instance[i])); in navi14_reg_base_init()
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i])); in navi14_reg_base_init()
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DMU_BASE.instance[i])); in navi14_reg_base_init()
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H A Damdgpu_navi10_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i])); in navi10_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i])); in navi10_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i])); in navi10_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i])); in navi10_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIO_BASE.instance[i])); in navi10_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i])); in navi10_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i])); in navi10_reg_base_init()
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(VCN_BASE.instance[i])); in navi10_reg_base_init()
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i])); in navi10_reg_base_init()
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DCN_BASE.instance[i])); in navi10_reg_base_init()
[all …]
H A Damdgpu_navi12_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i])); in navi12_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i])); in navi12_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i])); in navi12_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i])); in navi12_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIF0_BASE.instance[i])); in navi12_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i])); in navi12_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i])); in navi12_reg_base_init()
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(UVD0_BASE.instance[i])); in navi12_reg_base_init()
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i])); in navi12_reg_base_init()
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DMU_BASE.instance[i])); in navi12_reg_base_init()
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H A Damdgpu_vega10_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in vega10_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega10_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega10_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); in vega10_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); in vega10_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega10_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in vega10_reg_base_init()
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega10_reg_base_init()
47 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); in vega10_reg_base_init()
48 adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i])); in vega10_reg_base_init()
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H A Damdgpu_vega20_reg_init.c39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in vega20_reg_base_init()
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega20_reg_base_init()
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega20_reg_base_init()
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); in vega20_reg_base_init()
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); in vega20_reg_base_init()
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega20_reg_base_init()
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in vega20_reg_base_init()
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega20_reg_base_init()
47 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); in vega20_reg_base_init()
48 adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); in vega20_reg_base_init()
[all …]
/netbsd-src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/
H A Dargon2-core.c134 static void clear_memory(argon2_instance_t *instance, int clear);
137 clear_memory(argon2_instance_t *instance, int clear) in clear_memory() argument
141 if (instance->region != NULL) { in clear_memory()
142 sodium_memzero(instance->region->memory, in clear_memory()
143 sizeof(block) * instance->memory_blocks); in clear_memory()
145 if (instance->pseudo_rands != NULL) { in clear_memory()
146 sodium_memzero(instance->pseudo_rands, in clear_memory()
147 sizeof(uint64_t) * instance->segment_length); in clear_memory()
174 free_instance(argon2_instance_t *instance, int flags) in free_instance() argument
177 clear_memory(instance, flags & ARGON2_FLAG_CLEAR_MEMORY); in free_instance()
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H A Dargon2-core.h139 static uint32_t index_alpha(const argon2_instance_t *instance, in index_alpha() argument
167 position->slice * instance->segment_length + in index_alpha()
171 position->slice * instance->segment_length + in index_alpha()
178 reference_area_size = instance->lane_length - in index_alpha()
179 instance->segment_length + position->index - in index_alpha()
182 reference_area_size = instance->lane_length - in index_alpha()
183 instance->segment_length + in index_alpha()
201 : (position->slice + 1) * instance->segment_length; in index_alpha()
206 instance->lane_length; /* absolute position */ in index_alpha()
238 void fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance);
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H A Dargon2-fill-block-ssse3.c100 generate_addresses(const argon2_instance_t *instance, in generate_addresses() argument
109 if (instance != NULL && position != NULL) { in generate_addresses()
113 input_block.v[3] = instance->memory_blocks; in generate_addresses()
114 input_block.v[4] = instance->passes; in generate_addresses()
115 input_block.v[5] = instance->type; in generate_addresses()
117 for (i = 0; i < instance->segment_length; ++i) { in generate_addresses()
143 fill_segment_ssse3(const argon2_instance_t *instance, in fill_segment_ssse3() argument
156 if (instance == NULL) { in fill_segment_ssse3()
160 if (instance->type == Argon2_id && in fill_segment_ssse3()
165 pseudo_rands = instance->pseudo_rands; in fill_segment_ssse3()
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H A Dargon2-fill-block-avx512f.c106 generate_addresses(const argon2_instance_t *instance, in generate_addresses() argument
115 if (instance != NULL && position != NULL) { in generate_addresses()
119 input_block.v[3] = instance->memory_blocks; in generate_addresses()
120 input_block.v[4] = instance->passes; in generate_addresses()
121 input_block.v[5] = instance->type; in generate_addresses()
123 for (i = 0; i < instance->segment_length; ++i) { in generate_addresses()
149 fill_segment_avx512f(const argon2_instance_t *instance, in fill_segment_avx512f() argument
162 if (instance == NULL) { in fill_segment_avx512f()
166 if (instance->type == Argon2_id && in fill_segment_avx512f()
171 pseudo_rands = instance->pseudo_rands; in fill_segment_avx512f()
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H A Dargon2-fill-block-avx2.c101 generate_addresses(const argon2_instance_t *instance, in generate_addresses() argument
110 if (instance != NULL && position != NULL) { in generate_addresses()
114 input_block.v[3] = instance->memory_blocks; in generate_addresses()
115 input_block.v[4] = instance->passes; in generate_addresses()
116 input_block.v[5] = instance->type; in generate_addresses()
118 for (i = 0; i < instance->segment_length; ++i) { in generate_addresses()
144 fill_segment_avx2(const argon2_instance_t *instance, in fill_segment_avx2() argument
157 if (instance == NULL) { in fill_segment_avx2()
161 if (instance->type == Argon2_id && in fill_segment_avx2()
166 pseudo_rands = instance->pseudo_rands; in fill_segment_avx2()
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H A Dargon2-fill-block-ref.c112 generate_addresses(const argon2_instance_t *instance, in generate_addresses() argument
121 if (instance != NULL && position != NULL) { in generate_addresses()
125 input_block.v[3] = instance->memory_blocks; in generate_addresses()
126 input_block.v[4] = instance->passes; in generate_addresses()
127 input_block.v[5] = instance->type; in generate_addresses()
129 for (i = 0; i < instance->segment_length; ++i) { in generate_addresses()
144 fill_segment_ref(const argon2_instance_t *instance, argon2_position_t position) in fill_segment_ref() argument
155 if (instance == NULL) { in fill_segment_ref()
159 if (instance->type == Argon2_id && in fill_segment_ref()
164 pseudo_rands = instance->pseudo_rands; in fill_segment_ref()
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/netbsd-src/external/ibm-public/postfix/dist/proto/
H A Dpostfix-wrapper5 # Postfix multi-instance API
15 # activities between the postfix(1) command and a multi-instance
18 # With multi-instance support, the default Postfix instance
19 # is always required. This instance is identified by the
24 # Multi-instance support is backwards compatible: when you
25 # run only one Postfix instance, commands such as "postfix
38 # to find out what Postfix instances exist in a multi-instance
44 # a multi-instance configuration.
48 # To manage a specific Postfix instance, specify its configuration
53 # Alternatively, the postfix(1) command accepts the instance's
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/netbsd-src/sys/arch/powerpc/ibm4xx/dev/
H A Drgmii.c49 rgmii_attach(device_t self, int instance, in rgmii_attach() argument
57 instance %= 2; in rgmii_attach()
59 rgmii_disable(self, instance); in rgmii_attach()
61 ssr &= ~SSR_SP(instance, SSR_SP_MASK); in rgmii_attach()
70 rgmii_enable(device_t self, int instance) in rgmii_enable() argument
75 instance %= 2; in rgmii_enable()
79 fer |= FER_MDIOEN(instance); in rgmii_enable()
84 rgmii_disable(device_t self, int instance) in rgmii_disable() argument
89 instance %= 2; in rgmii_disable()
97 rgmii_speed(device_t self, int instance, int speed) in rgmii_speed() argument
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/netbsd-src/external/apache2/llvm/dist/libcxx/utils/google-benchmark/src/
H A Dbenchmark_register.cc92 static BenchmarkFamilies instance; in GetInstance() local
93 return &instance; in GetInstance()
155 BenchmarkInstance instance; in FindBenchmarks() local
156 instance.name = family->name_; in FindBenchmarks()
157 instance.benchmark = family.get(); in FindBenchmarks()
158 instance.aggregation_report_mode = family->aggregation_report_mode_; in FindBenchmarks()
159 instance.arg = args; in FindBenchmarks()
160 instance.time_unit = family->time_unit_; in FindBenchmarks()
161 instance.range_multiplier = family->range_multiplier_; in FindBenchmarks()
162 instance.min_time = family->min_time_; in FindBenchmarks()
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/netbsd-src/external/apache2/llvm/dist/llvm/utils/benchmark/src/
H A Dbenchmark_register.cc92 static BenchmarkFamilies instance; in GetInstance() local
93 return &instance; in GetInstance()
155 Benchmark::Instance instance; in FindBenchmarks() local
156 instance.name = family->name_; in FindBenchmarks()
157 instance.benchmark = family.get(); in FindBenchmarks()
158 instance.report_mode = family->report_mode_; in FindBenchmarks()
159 instance.arg = args; in FindBenchmarks()
160 instance.time_unit = family->time_unit_; in FindBenchmarks()
161 instance.range_multiplier = family->range_multiplier_; in FindBenchmarks()
162 instance.min_time = family->min_time_; in FindBenchmarks()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_dp_auxch.c68 int instance = chan->rec.i2c_id & 0xf; in radeon_dp_aux_transfer_native() local
109 tmp = RREG32(AUX_CONTROL + aux_offset[instance]); in radeon_dp_aux_transfer_native()
115 WREG32(AUX_CONTROL + aux_offset[instance], tmp); in radeon_dp_aux_transfer_native()
118 WREG32(AUX_SW_CONTROL + aux_offset[instance], in radeon_dp_aux_transfer_native()
120 WREG32(AUX_SW_CONTROL + aux_offset[instance], in radeon_dp_aux_transfer_native()
126 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
130 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
134 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
138 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
144 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
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/netbsd-src/external/gpl3/gcc/dist/libphobos/src/std/experimental/allocator/
H A Dgc_allocator.d17 version (StdUnittest) @system unittest { testAllocator!(() => GCAllocator.instance); } in version()
127 static shared const GCAllocator instance; member
139 auto buffer = GCAllocator.instance.allocate(1024 * 1024 * 4);
141 scope(exit) GCAllocator.instance.deallocate(buffer);
147 auto b = GCAllocator.instance.allocate(10_000);
148 assert(GCAllocator.instance.expand(b, 1));
157 assert((() nothrow @safe @nogc => GCAllocator.instance.goodAllocSize(1))() == 16);
160 assert((() nothrow @safe @nogc => GCAllocator.instance.goodAllocSize(s))() == s);
161 … assert((() nothrow @safe @nogc => GCAllocator.instance.goodAllocSize(s - (s / 2) + 1))() == s);
163 auto buffer = GCAllocator.instance.allocate(s);
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/netbsd-src/external/gpl3/gcc.old/dist/libphobos/src/std/experimental/allocator/building_blocks/
H A Dnull_allocator.d64 static shared NullAllocator instance; member
69 assert(NullAllocator.instance.alignedAllocate(100, 0) is null);
70 assert(NullAllocator.instance.allocateAll() is null);
71 auto b = NullAllocator.instance.allocate(100);
73 assert(NullAllocator.instance.expand(b, 0));
74 assert(!NullAllocator.instance.expand(b, 42));
75 assert(!NullAllocator.instance.reallocate(b, 42));
76 assert(!NullAllocator.instance.alignedReallocate(b, 42, 0));
77 NullAllocator.instance.deallocate(b);
78 NullAllocator.instance.deallocateAll();
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