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/netbsd-src/crypto/external/bsd/openssl.old/lib/libcrypto/arch/alpha/
H A Dalphacpuid.S18 clr $1
19 clr $2
20 clr $3
21 clr $4
22 clr $5
23 clr $6
24 clr $7
25 clr $8
26 clr $16
27 clr $17
[all …]
/netbsd-src/crypto/external/bsd/openssl/lib/libcrypto/arch/alpha/
H A Dalphacpuid.S18 clr $1
19 clr $2
20 clr $3
21 clr $4
22 clr $5
23 clr $6
24 clr $7
25 clr $8
26 clr $16
27 clr $17
[all …]
/netbsd-src/crypto/external/bsd/openssl.old/dist/crypto/
H A Dsparccpuid.S77 clr %o0
79 clr %o1
81 clr %o2
83 clr %o3
85 clr %o4
87 clr %o5
89 clr %o7
91 clr %l0
93 clr %l1
95 clr %l2
[all …]
/netbsd-src/crypto/external/bsd/openssl/dist/crypto/
H A Dsparccpuid.S81 clr %o0
83 clr %o1
85 clr %o2
87 clr %o3
89 clr %o4
91 clr %o5
93 clr %o7
95 clr %l0
97 clr %l1
99 clr %l2
[all …]
/netbsd-src/sys/arch/evbarm/ifpga/
H A Dplcom_ifpga.c113 u_int set, clr; in plcom_ifpga_set_mcr() local
115 set = clr = 0; in plcom_ifpga_set_mcr()
122 clr |= IFPGA_SC_CTRL_UART0RTS; in plcom_ifpga_set_mcr()
126 clr |= IFPGA_SC_CTRL_UART0DTR; in plcom_ifpga_set_mcr()
131 clr |= IFPGA_SC_CTRL_UART1RTS; in plcom_ifpga_set_mcr()
135 clr |= IFPGA_SC_CTRL_UART1DTR; in plcom_ifpga_set_mcr()
143 if (clr) in plcom_ifpga_set_mcr()
145 clr); in plcom_ifpga_set_mcr()
/netbsd-src/sys/arch/m68k/060sp/dist/
H A Ditest.s90 clr.l TESTCTR(%a6)
100 clr.l TESTCTR(%a6)
110 clr.l TESTCTR(%a6)
120 clr.l TESTCTR(%a6)
130 clr.l TESTCTR(%a6)
141 clr.l TESTCTR(%a6)
151 clr.l TESTCTR(%a6)
178 clr.l %d1
190 clr.l IREGS+0x8(%a6)
191 clr.l IREGS+0xc(%a6)
[all …]
H A Dos.s99 clr.l %d1 # return success
133 clr.l %d1 # return success
160 dmrbu: clr.l -(%sp) # clear space on stack for result
169 dmrbs: clr.l %d0 # clear whole longword
171 clr.l %d1 # return success
190 dmrwu: clr.l -(%sp) # clear space on stack for result
199 dmrws: clr.l %d0 # clear whole longword
201 clr.l %d1 # return success
230 clr.l %d1 # return success
258 clr.l %d1 # return success
[all …]
H A Dilsp.s308 clr.l %d1
323 clr.w %d5
337 clr.l DDNORMAL(%a6) # count of shifts for normalization
338 clr.b DDSECOND(%a6) # clear flag for quotient digits
339 clr.l %d1 # %d1 will hold trial quotient
372 clr.w %d6 # word u3 left
415 clr.l %d2
418 clr.w %d3 # %d3 now ls word of divisor
422 clr.w %d3 # %d3 now ms word of divisor
431 clr.l %d1
[all …]
/netbsd-src/sys/dev/rasops/
H A Drasops1-4_putchar.h58 (tmp) |= clr[(fb >> 31) & 1] >> bit; \
66 c = clr[1]; \
68 c = clr[0]; \
70 c = (w * clr[1] + (0xff - w) * clr[0]) >> 8; \
92 uint32_t bg, fg, lbg, rbg, clr[2], lmask, rmask, tmp; in NAME() local
152 clr[0] = bg & COLOR_MASK; in NAME()
153 clr[1] = fg & COLOR_MASK; in NAME()
235 clr[0] = bg & COLOR_MASK; in NAME()
236 clr[1] = fg & COLOR_MASK; in NAME()
H A Drasops_putchar.h49 #define SET_COLOR(p, index) *(p)++ = clr[index]
61 COLOR_TYPE c = clr[index]; \
104 COLOR_TYPE clr[2]; in NAME() local
128 clr[0] = (COLOR_TYPE)ATTR_BG(ri, attr); in NAME()
129 clr[1] = (COLOR_TYPE)ATTR_FG(ri, attr); in NAME()
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/libf7/
H A Dlibf7-asm.sx145 DEFUN clr
157 ENDF clr
175 clr ZBITS
188 clr ZERO
266 clr CA ; May be skipped
354 clr CA
399 clr r16
424 clr TMP
484 clr Carry
528 F7jmp clr
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/
H A Dlibf7-asm.sx145 DEFUN clr
157 ENDF clr
175 clr ZBITS
188 clr ZERO
266 clr CA ; May be skipped
354 clr CA
399 clr r16
424 clr TMP
484 clr Carry
528 F7jmp clr
[all …]
/netbsd-src/crypto/external/bsd/openssl/dist/crypto/bn/asm/
H A Dsparcv8plus.S182 clr %o0
191 clr %o5
284 clr %o0
293 clr %o5
372 clr %o0
419 clr %o0
443 clr %o0
477 clr %o0
514 clr %o0
537 clr %o0
[all …]
/netbsd-src/crypto/external/bsd/openssl.old/dist/crypto/bn/asm/
H A Dsparcv8plus.S182 clr %o0
191 clr %o5
284 clr %o0
293 clr %o5
372 clr %o0
419 clr %o0
443 clr %o0
477 clr %o0
514 clr %o0
537 clr %o0
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/
H A Dnouveau_dispnv50_head.c42 union nv50_head_atom_mask clr = { in nv50_head_flush_clr() local
43 .mask = asyh->clr.mask & ~(flush ? 0 : asyh->set.mask), in nv50_head_flush_clr()
45 if (clr.olut) head->func->olut_clr(head); in nv50_head_flush_clr()
46 if (clr.core) head->func->core_clr(head); in nv50_head_flush_clr()
47 if (clr.curs) head->func->curs_clr(head); in nv50_head_flush_clr()
386 asyh->clr.core = true; in nv50_head_atomic_check()
394 asyh->clr.curs = true; in nv50_head_atomic_check()
402 asyh->clr.olut = true; in nv50_head_atomic_check()
405 asyh->clr.olut = armh->olut.visible; in nv50_head_atomic_check()
406 asyh->clr.core = armh->core.visible; in nv50_head_atomic_check()
[all …]
H A Dnouveau_dispnv50_wndw.c122 union nv50_wndw_atom_mask clr = { in nv50_wndw_flush_clr() local
123 .mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask), in nv50_wndw_flush_clr()
125 if (clr.sema ) wndw->func-> sema_clr(wndw); in nv50_wndw_flush_clr()
126 if (clr.ntfy ) wndw->func-> ntfy_clr(wndw); in nv50_wndw_flush_clr()
127 if (clr.xlut ) wndw->func-> xlut_clr(wndw); in nv50_wndw_flush_clr()
128 if (clr.csc ) wndw->func-> csc_clr(wndw); in nv50_wndw_flush_clr()
129 if (clr.image) wndw->func->image_clr(wndw); in nv50_wndw_flush_clr()
375 asyw->clr.xlut = armw->xlut.handle != 0; in nv50_wndw_atomic_check_lut()
390 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check_lut()
463 asyw->clr.ntfy = armw->ntfy.handle != 0; in nv50_wndw_atomic_check()
[all …]
/netbsd-src/external/gpl3/gcc/dist/libstdc++-v3/scripts/
H A Dmake_graph.py145 clr = color.navy
147 clr = color.green4
149 clr = color.mediumblue
152 clr = color.gray50
155 clr = color.gray58
158 clr = color.red3
161 clr = color.orangered1
164 clr = color.blueviolet
200 return (tm, line_style.T(color = clr, width = 2))
/netbsd-src/external/gpl3/gcc.old/dist/libstdc++-v3/scripts/
H A Dmake_graph.py145 clr = color.navy
147 clr = color.green4
149 clr = color.mediumblue
152 clr = color.gray50
155 clr = color.gray58
158 clr = color.red3
161 clr = color.orangered1
164 clr = color.blueviolet
200 return (tm, line_style.T(color = clr, width = 2))
/netbsd-src/sys/arch/m68k/fpsp/
H A Dscale.sa77 fmove.l #0,fpcr ;clr user enabled exc
78 clr.l d1
83 andi.w #$7fff,d0 ;clr sign bit
116 fmove.l #0,FPSR ;clr status from above
200 clr.l L_SCR2(a6)
219 clr.w FPTEMP_EX(a6)
248 beq.b no_dir ;if clr, neg op, no inc
293 clr.l FPTEMP_EX(a6)
294 clr.l FPTEMP_HI(a6)
299 beq.b no_dir2 ;if clr, neg op, no inc
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/m68k/
H A Dcf.md341 clr,clr_l,mov3q_l,move,moveq_l,tst,
351 clr,clr_l,mov3q_l,move,moveq_l,tst,
361 clr,clr_l,mov3q_l,move,moveq_l,tst,
394 clr,clr_l,mov3q_l,move,moveq_l,tst,
403 clr,clr_l,mov3q_l,move,moveq_l,tst,
412 clr,clr_l,mov3q_l,move,moveq_l,tst,
422 clr,clr_l,mov3q_l,move,moveq_l,tst"))
431 clr,clr_l,mov3q_l,move,moveq_l,tst"))
440 clr,clr_l,mov3q_l,move,moveq_l,tst"))
473 clr,clr_l,mov3q_l,move,moveq_l,tst"))
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/m68k/
H A Dcf.md341 clr,clr_l,mov3q_l,move,moveq_l,tst,
351 clr,clr_l,mov3q_l,move,moveq_l,tst,
361 clr,clr_l,mov3q_l,move,moveq_l,tst,
394 clr,clr_l,mov3q_l,move,moveq_l,tst,
403 clr,clr_l,mov3q_l,move,moveq_l,tst,
412 clr,clr_l,mov3q_l,move,moveq_l,tst,
422 clr,clr_l,mov3q_l,move,moveq_l,tst"))
431 clr,clr_l,mov3q_l,move,moveq_l,tst"))
440 clr,clr_l,mov3q_l,move,moveq_l,tst"))
473 clr,clr_l,mov3q_l,move,moveq_l,tst"))
[all …]
/netbsd-src/sys/arch/m68k/fpe/
H A Dfpu_int.c46 int sh, clr, mask, i; in fpu_intrz() local
65 clr = 2 - sh / 32; in fpu_intrz()
68 for (i = 2; i > clr; i--) { in fpu_intrz()
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/
H A Dlib1funcs.S123 clr r29
220 clr r_res ; clear result
261 clr A1
262 clr B1
273 clr B1
278 clr A1
281 clr BB0
308 clr CC0
309 clr CC1
381 clr B2
[all …]
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/
H A Dlib1funcs.S123 clr r29
220 clr r_res ; clear result
261 clr A1
262 clr B1
273 clr B1
278 clr A1
281 clr BB0
308 clr CC0
309 clr CC1
381 clr B2
[all …]
/netbsd-src/sys/arch/arm/nvidia/
H A Dtegra_drm.h147 #define HDMI_SET_CLEAR(enc, reg, set, clr) \ argument
148 tegra_reg_set_clear((enc)->bst, (enc)->bsh, (reg), (set), (clr))
154 #define DC_SET_CLEAR(crtc, reg, set, clr) \ argument
155 tegra_reg_set_clear((crtc)->bst, (crtc)->bsh, (reg), (set), (clr))

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