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/netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/
H A DMSP430Target.def179 // With 16-bit hardware multiplier
180 MSP430_MCU_FEAT("msp430f147", "16bit")
181 MSP430_MCU_FEAT("msp430f148", "16bit")
182 MSP430_MCU_FEAT("msp430f149", "16bit")
183 MSP430_MCU_FEAT("msp430f1471", "16bit")
184 MSP430_MCU_FEAT("msp430f1481", "16bit")
185 MSP430_MCU_FEAT("msp430f1491", "16bit")
186 MSP430_MCU_FEAT("msp430f167", "16bit")
187 MSP430_MCU_FEAT("msp430f168", "16bit")
188 MSP430_MCU_FEAT("msp430f169", "16bit")
[all …]
/netbsd-src/external/bsd/file/dist/magic/magdir/
H A Dispell17 >2 leshort 0x00 8-bit, no capitalization, 26 flags
18 >2 leshort 0x01 7-bit, no capitalization, 26 flags
19 >2 leshort 0x02 8-bit, capitalization, 26 flags
20 >2 leshort 0x03 7-bit, capitalization, 26 flags
21 >2 leshort 0x04 8-bit, no capitalization, 52 flags
22 >2 leshort 0x05 7-bit, no capitalization, 52 flags
23 >2 leshort 0x06 8-bit, capitalization, 52 flags
24 >2 leshort 0x07 7-bit, capitalization, 52 flags
25 >2 leshort 0x08 8-bit, no capitalization, 128 flags
26 >2 leshort 0x09 7-bit, no capitalization, 128 flags
[all …]
H A Dmach9 # if set, it's for the 64-bit version of the architecture
10 # yes, this is separate from the low-order magic number bit
11 # it's also separate from the "64-bit libraries" bit in the
20 # 32-bit ABIs.
153 # 64-bit ABIs.
155 >>0 belong&0x00ffffff 0 64-bit architecture=%d
156 >>0 belong&0x00ffffff 1 64-bit architecture=%d
157 >>0 belong&0x00ffffff 2 64-bit architecture=%d
158 >>0 belong&0x00ffffff 3 64-bit architecture=%d
159 >>0 belong&0x00ffffff 4 64-bit architecture=%d
[all …]
/netbsd-src/external/lgpl3/gmp/dist/mpn/generic/
H A Djacobi_2.c46 mpn_jacobi_2 (mp_srcptr ap, mp_srcptr bp, unsigned bit) in mpn_jacobi_2() argument
62 return 1 - 2*(bit & 1); in mpn_jacobi_2()
71 bit ^= GMP_NUMB_BITS & (bl ^ (bl >> 1)); in mpn_jacobi_2()
74 bit ^= c & (bl ^ (bl >> 1)); in mpn_jacobi_2()
99 bit ^= (bgta & al & bl); in mpn_jacobi_2()
105 return 1 - 2*(bit & 1); in mpn_jacobi_2()
117 bit ^= GMP_NUMB_BITS & (bl ^ (bl >> 1)); in mpn_jacobi_2()
121 bit ^= c & (bl ^ (bl >> 1)); in mpn_jacobi_2()
147 bit ^= (bgta & al & bl); in mpn_jacobi_2()
160 bit ^= c & (bl ^ (bl >> 1)); in mpn_jacobi_2()
[all …]
/netbsd-src/sys/arch/arm/at91/
H A Dat91pio.c245 at91pio_read(struct at91pio_softc *sc, int bit) in at91pio_read() argument
248 sc->pins[bit].pin_caps = 0; in at91pio_read()
250 return (PIO_READ(sc, PIO_PDSR) >> bit) & 1; in at91pio_read()
254 at91pio_set(struct at91pio_softc *sc, int bit) in at91pio_set() argument
257 sc->pins[bit].pin_caps = 0; in at91pio_set()
259 PIO_WRITE(sc, PIO_SODR, (1U << bit)); in at91pio_set()
263 at91pio_clear(struct at91pio_softc *sc, int bit) in at91pio_clear() argument
266 sc->pins[bit].pin_caps = 0; in at91pio_clear()
268 PIO_WRITE(sc, PIO_CODR, (1U << bit)); in at91pio_clear()
272 at91pio_in(struct at91pio_softc *sc, int bit) in at91pio_in() argument
[all …]
/netbsd-src/sys/arch/sparc/fpu/
H A Dfpu_sqrt.c192 u_int bit, q, tt; in fpu_sqrt() local
270 bit = FP_1; in fpu_sqrt()
273 q = bit; in fpu_sqrt()
274 x0 -= bit; in fpu_sqrt()
275 y0 = bit << 1; in fpu_sqrt()
278 while ((bit >>= 1) != 0) { /* for remaining bits in q0 */ in fpu_sqrt()
280 t0 = y0 | bit; /* t = y + bit */ in fpu_sqrt()
283 q |= bit; /* q += bit */ in fpu_sqrt()
284 y0 |= bit << 1; /* y += bit << 1 */ in fpu_sqrt()
296 bit = 1 << 31; in fpu_sqrt()
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/mfd/
H A Dstm32f4-rcc.h36 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
37 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
47 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
48 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
54 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
55 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
84 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
85 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
108 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
109 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
H A Dstm32f7-rcc.h36 #define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8)) argument
37 #define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit) argument
47 #define STM32F7_AHB2_RESET(bit) (STM32F7_RCC_AHB2_##bit + (0x14 * 8)) argument
48 #define STM32F7_AHB2_CLOCK(bit) (STM32F7_RCC_AHB2_##bit + 0x20) argument
54 #define STM32F7_AHB3_RESET(bit) (STM32F7_RCC_AHB3_##bit + (0x18 * 8)) argument
55 #define STM32F7_AHB3_CLOCK(bit) (STM32F7_RCC_AHB3_##bit + 0x40) argument
88 #define STM32F7_APB1_RESET(bit) (STM32F7_RCC_APB1_##bit + (0x20 * 8)) argument
89 #define STM32F7_APB1_CLOCK(bit) (STM32F7_RCC_APB1_##bit + 0x80) argument
113 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) argument
114 #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) argument
H A Dstm32h7-rcc.h19 #define STM32H7_AHB3_RESET(bit) (STM32H7_RCC_AHB3_##bit + (0x7C * 8)) argument
30 #define STM32H7_AHB1_RESET(bit) (STM32H7_RCC_AHB1_##bit + (0x80 * 8)) argument
39 #define STM32H7_AHB2_RESET(bit) (STM32H7_RCC_AHB2_##bit + (0x84 * 8)) argument
58 #define STM32H7_AHB4_RESET(bit) (STM32H7_RCC_AHB4_##bit + (0x88 * 8)) argument
64 #define STM32H7_APB3_RESET(bit) (STM32H7_RCC_APB3_##bit + (0x8C * 8)) argument
92 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) argument
101 #define STM32H7_APB1H_RESET(bit) (STM32H7_RCC_APB1H_##bit + (0x94 * 8)) argument
120 #define STM32H7_APB2_RESET(bit) (STM32H7_RCC_APB2_##bit + (0x98 * 8)) argument
136 #define STM32H7_APB4_RESET(bit) (STM32H7_RCC_APB4_##bit + (0x9C * 8)) argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIInstrFormats.td17 field bit SALU = 0;
18 field bit VALU = 0;
21 field bit SOP1 = 0;
22 field bit SOP2 = 0;
23 field bit SOPC = 0;
24 field bit SOPK = 0;
25 field bit SOPP = 0;
28 field bit VOP1 = 0;
29 field bit VOP2 = 0;
30 field bit VOPC = 0;
[all …]
/netbsd-src/sys/arch/powerpc/fpu/
H A Dfpu_sqrt.c196 u_int bit, q, tt; in fpu_sqrt() local
290 bit = FP_1; in fpu_sqrt()
293 q = bit; in fpu_sqrt()
294 x0 -= bit; in fpu_sqrt()
295 y0 = bit << 1; in fpu_sqrt()
298 while ((bit >>= 1) != 0) { /* for remaining bits in q0 */ in fpu_sqrt()
300 t0 = y0 | bit; /* t = y + bit */ in fpu_sqrt()
303 q |= bit; /* q += bit */ in fpu_sqrt()
304 y0 |= bit << 1; /* y += bit << 1 */ in fpu_sqrt()
316 bit = 1 << 31; in fpu_sqrt()
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-bpf.texi71 The eBPF processor provides ten general-purpose 64-bit registers,
119 The @code{.half} directive produces a 16 bit value.
123 The @code{.word} directive produces a 32 bit value.
127 The @code{.dword} directive produces a 64 bit value.
146 16-bit signed PC-relative offset, measured in number of 64-bit words,
149 32-bit signed PC-relative offset, measured in number of 64-bit words,
152 Signed 16-bit immediate.
154 Signed 32-bit immediate.
156 Signed 64-bit immediate.
166 64-bit arithmetic addition.
[all …]
/netbsd-src/sys/arch/m68k/fpe/
H A Dfpu_sqrt.c192 uint32_t bit, q, tt; in fpu_sqrt() local
270 bit = FP_1; in fpu_sqrt()
273 q = bit; in fpu_sqrt()
274 x0 -= bit; in fpu_sqrt()
275 y0 = bit << 1; in fpu_sqrt()
278 while ((bit >>= 1) != 0) { /* for remaining bits in q0 */ in fpu_sqrt()
280 t0 = y0 | bit; /* t = y + bit */ in fpu_sqrt()
283 q |= bit; /* q += bit */ in fpu_sqrt()
284 y0 |= bit << 1; /* y += bit << 1 */ in fpu_sqrt()
296 bit = 1 << 31; in fpu_sqrt()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td10 def WriteIALU : SchedWrite; // 32 or 64-bit integer ALU operations
11 def WriteIALU32 : SchedWrite; // 32-bit integer ALU operations on RV64I
12 def WriteShiftImm : SchedWrite; // 32 or 64-bit shift by immediate operations
13 def WriteShiftImm32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
14 def WriteShiftReg : SchedWrite; // 32 or 64-bit shift by immediate operations
15 def WriteShiftReg32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
16 def WriteIDiv : SchedWrite; // 32-bit or 64-bit divide and remainder
17 def WriteIDiv32 : SchedWrite; // 32-bit divide and remainder on RV64I
18 def WriteIMul : SchedWrite; // 32-bit or 64-bit multiply
19 def WriteIMul32 : SchedWrite; // 32-bit multiply on RV64I
[all …]
/netbsd-src/sys/external/bsd/common/include/linux/
H A Dbitops.h154 __test_and_set_bit(unsigned int bit, volatile unsigned long *ptr) in __test_and_set_bit() argument
157 volatile unsigned long *const p = &ptr[bit / units]; in __test_and_set_bit()
158 const unsigned long mask = (1UL << (bit % units)); in __test_and_set_bit()
168 __test_and_clear_bit(unsigned int bit, volatile unsigned long *ptr) in __test_and_clear_bit() argument
171 volatile unsigned long *const p = &ptr[bit / units]; in __test_and_clear_bit()
172 const unsigned long mask = (1UL << (bit % units)); in __test_and_clear_bit()
182 __test_and_change_bit(unsigned int bit, volatile unsigned long *ptr) in __test_and_change_bit() argument
185 volatile unsigned long *const p = &ptr[bit / units]; in __test_and_change_bit()
186 const unsigned long mask = (1UL << (bit % units)); in __test_and_change_bit()
207 * works on unsigned long. This is a waste on 32-bit system in __find_next_bit()
290 set_bit(unsigned int bit,volatile unsigned long * ptr) set_bit() argument
299 clear_bit(unsigned int bit,volatile unsigned long * ptr) clear_bit() argument
308 clear_bit_unlock(unsigned int bit,volatile unsigned long * ptr) clear_bit_unlock() argument
318 change_bit(unsigned int bit,volatile unsigned long * ptr) change_bit() argument
330 test_and_set_bit(unsigned int bit,volatile unsigned long * ptr) test_and_set_bit() argument
345 test_and_clear_bit(unsigned int bit,volatile unsigned long * ptr) test_and_clear_bit() argument
360 test_and_change_bit(unsigned int bit,volatile unsigned long * ptr) test_and_change_bit() argument
[all...]
/netbsd-src/crypto/external/bsd/openssl/dist/doc/man3/
H A DOPENSSL_ia32cap.pod24 =item bit #4 denoting presence of Time-Stamp Counter.
26 =item bit #19 denoting availability of CLFLUSH instruction;
28 =item bit #20, reserved by Intel, is used to choose among RC4 code paths;
30 =item bit #23 denoting MMX support;
32 =item bit #24, FXSR bit, denoting availability of XMM registers;
34 =item bit #25 denoting SSE support;
36 =item bit #26 denoting SSE2 support;
38 =item bit #28 denoting Hyperthreading, which is used to distinguish
41 =item bit #30, reserved by Intel, denotes specifically Intel CPUs;
43 =item bit #33 denoting availability of PCLMULQDQ instruction;
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
H A Domap24xx-clocks.dtsi12 ti,bit-shift = <2>;
26 ti,bit-shift = <6>;
78 ti,bit-shift = <23>;
94 ti,bit-shift = <6>;
103 ti,bit-shift = <6>;
132 ti,bit-shift = <2>;
142 ti,bit-shift = <6>;
152 ti,bit-shift = <5>;
180 ti,bit-shift = <3>;
196 ti,bit-shift = <7>;
[all …]
H A Domap3xxx-clocks.dtsi25 ti,bit-shift = <6>;
36 ti,bit-shift = <7>;
85 ti,bit-shift = <4>;
99 ti,bit-shift = <2>;
113 ti,bit-shift = <6>;
140 ti,bit-shift = <2>;
221 ti,bit-shift = <0x1b>;
223 ti,set-bit-to-disable;
245 ti,bit-shift = <16>;
263 ti,bit-shift = <0xc>;
[all …]
/netbsd-src/sys/dev/tprof/
H A Dtprof_x86_amd.c164 int bit; in tprof_amd_start() local
166 while ((bit = ffs(runmask)) != 0) { in tprof_amd_start()
167 bit--; in tprof_amd_start()
168 CLR(runmask, __BIT(bit)); in tprof_amd_start()
169 wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) | PESR_EN); in tprof_amd_start()
176 int bit; in tprof_amd_stop() local
178 while ((bit = ffs(stopmask)) != 0) { in tprof_amd_stop()
179 bit--; in tprof_amd_stop()
180 CLR(stopmask, __BIT(bit)); in tprof_amd_stop()
181 wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) & ~PESR_EN); in tprof_amd_stop()
[all …]
H A Dtprof_x86_intel.c155 int bit; in tprof_intel_start() local
157 while ((bit = ffs(runmask)) != 0) { in tprof_intel_start()
158 bit--; in tprof_intel_start()
159 CLR(runmask, __BIT(bit)); in tprof_intel_start()
160 wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) | PERFEVTSEL_EN); in tprof_intel_start()
167 int bit; in tprof_intel_stop() local
169 while ((bit = ffs(stopmask)) != 0) { in tprof_intel_stop()
170 bit--; in tprof_intel_stop()
171 CLR(stopmask, __BIT(bit)); in tprof_intel_stop()
172 wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) & in tprof_intel_stop()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/ELFRelocs/
H A DM68k.def6 ELF_RELOC(R_68K_32, 1) /* Direct 32 bit */
7 ELF_RELOC(R_68K_16, 2) /* Direct 16 bit */
8 ELF_RELOC(R_68K_8, 3) /* Direct 8 bit */
9 ELF_RELOC(R_68K_PC32, 4) /* PC relative 32 bit */
10 ELF_RELOC(R_68K_PC16, 5) /* PC relative 16 bit */
11 ELF_RELOC(R_68K_PC8, 6) /* PC relative 8 bit */
12 ELF_RELOC(R_68K_GOTPCREL32, 7) /* 32 bit PC relative GOT entry */
13 ELF_RELOC(R_68K_GOTPCREL16, 8) /* 16 bit PC relative GOT entry */
14 ELF_RELOC(R_68K_GOTPCREL8, 9) /* 8 bit PC relative GOT entry */
15 ELF_RELOC(R_68K_GOTOFF32, 10) /* 32 bit GOT offset */
[all …]
/netbsd-src/crypto/external/bsd/openssl.old/dist/doc/man3/
H A DOPENSSL_ia32cap.pod24 =item bit #4 denoting presence of Time-Stamp Counter.
26 =item bit #19 denoting availability of CLFLUSH instruction;
28 =item bit #20, reserved by Intel, is used to choose among RC4 code paths;
30 =item bit #23 denoting MMX support;
32 =item bit #24, FXSR bit, denoting availability of XMM registers;
34 =item bit #25 denoting SSE support;
36 =item bit #26 denoting SSE2 support;
38 =item bit #28 denoting Hyperthreading, which is used to distinguish
41 =item bit #30, reserved by Intel, denotes specifically Intel CPUs;
43 =item bit #33 denoting availability of PCLMULQDQ instruction;
[all …]
/netbsd-src/sys/external/bsd/drm2/linux/
H A Dlinux_wait_bit.c81 wait_bit_hash(const volatile unsigned long *bitmap, unsigned bit) in wait_bit_hash() argument
84 const volatile unsigned long *word = bitmap + bit/(NBBY*sizeof(*word)); in wait_bit_hash()
91 wait_bit_enter(const volatile unsigned long *bitmap, unsigned bit) in wait_bit_enter() argument
93 struct waitbitentry *wbe = &waitbittab[wait_bit_hash(bitmap, bit)].ent; in wait_bit_enter()
115 clear_and_wake_up_bit(int bit, volatile unsigned long *bitmap) in clear_and_wake_up_bit() argument
119 wbe = wait_bit_enter(bitmap, bit); in clear_and_wake_up_bit()
120 clear_bit(bit, bitmap); in clear_and_wake_up_bit()
133 wait_on_bit(const volatile unsigned long *bitmap, unsigned bit, int flags) in wait_on_bit() argument
138 if (test_bit(bit, bitmap) == 0) in wait_on_bit()
141 wbe = wait_bit_enter(bitmap, bit); in wait_on_bit()
[all …]
/netbsd-src/sys/arch/m68k/include/
H A Dasm_single.h38 #define single_inst_bset_b(var, bit) \ argument
41 : "di" ((u_char)bit))
43 #define single_inst_bclr_b(var, bit) \ argument
46 : "di" ((u_char)~(bit)))
49 #define single_inst_bset_w(var, bit) \ argument
52 : "di" ((u_short)bit))
54 #define single_inst_bclr_w(var, bit) \ argument
57 : "di" ((u_short)~(bit)))
60 #define single_inst_bset_l(var, bit) \ argument
63 : "di" ((u_long)bit))
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/rl78/
H A Dlib2shift.c31 uint32_type __ashlsi3 (uint32_type in, char bit);
32 sint32_type __ashrsi3 (sint32_type in, char bit);
46 __ashlsi3 (uint32_type in, char bit) in __ashlsi3() argument
51 if (bit > 32) in __ashlsi3()
53 if (bit < 0) in __ashlsi3()
60 if (bit > 15) in __ashlsi3()
64 bit -= 16; in __ashlsi3()
67 while (bit) in __ashlsi3()
71 bit --; in __ashlsi3()
80 __ashrsi3 (sint32_type in, char bit) in __ashrsi3() argument
[all …]

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