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Searched refs:VGA_MEMORY_DISABLE (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Davivod.h57 #define VGA_MEMORY_DISABLE (1 << 4) macro
H A Dsid.h77 #define VGA_MEMORY_DISABLE (1 << 4) macro
H A Dcikd.h438 #define VGA_MEMORY_DISABLE (1 << 4) macro
H A Dradeon_rv770.c1037 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in rv770_mc_program()
H A Dradeon_r600.c1357 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in r600_mc_program()
H A Dradeon_evergreen.c2876 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in evergreen_mc_program()
H A Dradeon_si.c4170 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in si_mc_program()
H A Dradeon_cik.c5319 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in cik_mc_program()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gmc_v9_0.c1337 WREG32_FIELD15(DCE, 0, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in gmc_v9_0_hw_init()
H A Damdgpu_gmc_v7_0.c286 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in gmc_v7_0_mc_program()
H A Damdgpu_dce_v8_0.c389 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v8_0_set_vga_render_state()
391 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v8_0_set_vga_render_state()
H A Dsid.h79 #define VGA_MEMORY_DISABLE (1 << 4) macro
H A Damdgpu_gmc_v8_0.c477 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in gmc_v8_0_mc_program()
H A Damdgpu_dce_v10_0.c456 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v10_0_set_vga_render_state()
458 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v10_0_set_vga_render_state()
H A Damdgpu_dce_v11_0.c472 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v11_0_set_vga_render_state()
474 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v11_0_set_vga_render_state()