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Searched refs:SQ_DPP_ROW_SR6 (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_enum.h3568 #define SQ_DPP_ROW_SR6 0x116 macro
H A Dgfx_8_1_enum.h3586 #define SQ_DPP_ROW_SR6 0x116 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dvega10_enum.h18198 #define SQ_DPP_ROW_SR6 0x00000116 macro