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Searched refs:SPE (Results 1 – 25 of 117) sorted by relevance

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/netbsd-src/lib/libcrypt/
H A Dcrypt.c139 * the "8"-valued bit, and so on.) In fact, a combined "SPE"-box lookup is
142 * iteration. Two 32-bit wide tables, SPE[0] and SPE[1], are used for this
144 * lookup of SPE[0] and SPE[1] is simple and fast. The key schedule and
145 * "salt" are also converted to this 8*(6+2) format. The SPE table size is
162 * also inhibits grouping the SPE table to look up 12 bits at a time. (The
164 * high-order zero, providing fast indexing into a 64-bit wide SPE.) On the
165 * other hand, 64-bit datatypes are currently rare, and a 12-bit SPE lookup
178 * the SPE transformatio
459 static int32_t SPE[2][8][64]; global() variable
[all...]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td44 // SPE - One of the 32 64-bit general-purpose registers (SPE)
45 class SPE<GPR SubReg, string n> : PPCReg<n> {
133 // SPE registers
135 def S#Index : SPE<!cast<GPR>("R"#Index), "r"#Index>,
258 // SPE extra registers
259 // SPE Accumulator for multiply-accumulate SPE operations. Never directly
H A DPPCCallingConv.td211 // With SPE floats are stored as single precision, so have alignment and
270 // SPE does not use FPRs, so break out the common register set as base.
H A DPPCScheduleP9.td43 // Do not support SPE (Signal Processing Engine), prefixed instructions on
H A DPPCInstrSPE.td1 //=======-- PPCInstrSPE.td - The PowerPC SPE Extension -*- tablegen -*-=======//
138 let DecoderNamespace = "SPE", Predicates = [HasSPE] in {
333 // SPE Vector operations
H A DPPC.td77 "Enable SPE instructions",
H A DP9InstrResources.td1351 // Signal Processing Engine (SPE) Instructions
/netbsd-src/external/gpl3/binutils/dist/gas/doc/
H A Dc-ppc.texi85 Generate code for e200 variants, e200z2 with LSP, e200z4 with SPE.
106 Enable LSP instructions. (Disables SPE and SPE2.)
109 Generate code for Motorola SPE instructions. (Disables LSP.)
/netbsd-src/external/bsd/liblzf/dist/
H A DLICENSE16 EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPE-
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi84 * Shared interrupt 0 is routed only to AON/SPE, so
H A Dtegra194.dtsi1212 * Shared interrupt 0 is routed only to AON/SPE, so
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-ppc.texi100 Generate code for Motorola SPE instructions.
/netbsd-src/external/apache2/llvm/dist/llvm/docs/
H A DCompilerWriterInfo.rst82 * `Signal Processing Engine (SPE) Programming Environments Manual: A Supplement to the EREF <https:…
/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DItaniumMangle.cpp4954 auto *SPE = cast<SizeOfPackExpr>(E); in mangleExpression() local
4955 if (SPE->isPartiallySubstituted()) { in mangleExpression()
4957 for (const auto &A : SPE->getPartialArguments()) in mangleExpression()
4964 const NamedDecl *Pack = SPE->getPack(); in mangleExpression()
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A DChangeLog-2017725 (vle_opcodes): Add EFS2 and some missing SPE opcodes.
726 (powerpc_macros): Map old SPE instructions have new names
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A DChangeLog-2017725 (vle_opcodes): Add EFS2 and some missing SPE opcodes.
726 (powerpc_macros): Map old SPE instructions have new names
/netbsd-src/external/gpl3/gdb/dist/opcodes/
H A DChangeLog-2017725 (vle_opcodes): Add EFS2 and some missing SPE opcodes.
726 (powerpc_macros): Map old SPE instructions have new names
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/
H A DChangeLog-2017725 (vle_opcodes): Add EFS2 and some missing SPE opcodes.
726 (powerpc_macros): Map old SPE instructions have new names
/netbsd-src/external/gpl3/gcc/dist/gcc/
H A DChangeLog-20022238 * config/rs6000/rs6000.c (function_arg): Set inner mode of SPE
12063 * config/rs6000/rs6000.c (function_arg_advance): SPE vararg
12295 (rs6000_legitimize_reload_address): Handle SPE vector modes.
12296 (rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
12300 Add cases for SPE vector modes.
12301 (function_arg_boundary): Return 64 for SPE vector modes.
12303 Handle SPE vectors.
12309 (bdesc_2arg): Un-constify and add SPE builtins.
12313 (rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
12319 (rs6000_expand_builtin): Call spe_expand_builtin for SPE.
[all …]
/netbsd-src/external/gpl3/binutils/dist/gas/po/
H A Dzh_CN.po6936 msgstr "SPE 在此目标机上不受支持"
13016 msgstr "目标属性或 pragma 改变了 SPE ABI"
13021 msgstr "目标属性或 pragma 改变了 SPE ABI"
13869 "-mspe generate code for Motorola SPE instructions\n"
17231 msgstr "SPE 在此目标机上不受支持"
17236 msgstr "SPE 在此目标机上不受支持"
17241 msgstr "SPE 在此目标机上不受支持"
17246 msgstr "SPE 在此目标机上不受支持"
17251 msgstr "SPE 在此目标机上不受支持"
17256 msgstr "SPE 在此目标机上不受支持"
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gas/po/
H A Dzh_CN.po6936 msgstr "SPE 在此目标机上不受支持"
13016 msgstr "目标属性或 pragma 改变了 SPE ABI"
13021 msgstr "目标属性或 pragma 改变了 SPE ABI"
13869 "-mspe generate code for Motorola SPE instructions\n"
17231 msgstr "SPE 在此目标机上不受支持"
17236 msgstr "SPE 在此目标机上不受支持"
17241 msgstr "SPE 在此目标机上不受支持"
17246 msgstr "SPE 在此目标机上不受支持"
17251 msgstr "SPE 在此目标机上不受支持"
17256 msgstr "SPE 在此目标机上不受支持"
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gold/po/
H A Dsr.po3570 msgid "%s uses AltiVec vector ABI, %s uses SPE vector ABI"
3571 msgstr "„%s“ користи „AltiVec“ вектор „ABI“, „%s“ користи „SPE“ вектор „ABI“"
H A Duk.po3577 msgid "%s uses AltiVec vector ABI, %s uses SPE vector ABI"
3578 msgstr "%s використовує векторний ABI AltiVec, %s використовує векторний ABI SPE"
/netbsd-src/external/gpl3/binutils/dist/gold/po/
H A Dsr.po3593 msgid "%s uses AltiVec vector ABI, %s uses SPE vector ABI"
3594 msgstr "„%s“ користи „AltiVec“ вектор „ABI“, „%s“ користи „SPE“ вектор „ABI“"
H A Duk.po3594 msgid "%s uses AltiVec vector ABI, %s uses SPE vector ABI"
3595 msgstr "%s використовує векторний ABI AltiVec, %s використовує векторний ABI SPE"

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