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Searched refs:SBIC_CSR_RESET (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/sys/arch/mvme68k/dev/
H A Dsbicreg.h211 #define SBIC_CSR_RESET 0x00 /* chip was reset */ macro
220 #define SBIC_CSR_RESET 0x00 /* reset w/advanced features */ macro
H A Dsbic.c1708 u_char asr, csr = SBIC_CSR_RESET; /* XXX: Quell un-init warning */ in sbicpoll()
/netbsd-src/sys/arch/amiga/dev/
H A Dsbicreg.h211 #define SBIC_CSR_RESET 0x00 /* chip was reset */ macro
220 #define SBIC_CSR_RESET 0x00 /* reset w/advanced features*/ macro
/netbsd-src/sys/arch/sgimips/stand/common/
H A Diris_scsireg.h284 #define SBIC_CSR_RESET 0x00 /* chip was reset */ macro
293 #define SBIC_CSR_RESET 0x00 /* reset w/advanced features*/ macro
/netbsd-src/sys/arch/acorn32/podulebus/
H A Dsbicreg.h211 #define SBIC_CSR_RESET 0x00 /* chip was reset */ macro
220 #define SBIC_CSR_RESET 0x00 /* reset w/advanced features*/ macro
/netbsd-src/sys/dev/ic/
H A Dwd33c93reg.h258 #define SBIC_CSR_RESET 0x00 /* chip was reset */ macro
267 #define SBIC_CSR_RESET 0x00 /* reset w/advanced features*/ macro
H A Dwd33c93.c324 case SBIC_CSR_RESET: in wd33c93_reset()