| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| H A D | a3.s | 8 R0 = W [ P1 + -2 ] (Z); DBGA ( R0.L , 49 ); define
9 R0 = W [ P1 + -4 ] (Z); DBGA ( R0.L , 48 ); define
10 R0 = W [ P1 + -6 ] (Z); DBGA ( R0.L , 47 ); define
11 R0 = W [ P1 + -8 ] (Z); DBGA ( R0.L , 46 ); define
12 R0 = W [ P1 + -10 ] (Z); DBGA ( R0.L , 45 ); define
13 R0 = W [ P1 + -12 ] (Z); DBGA ( R0.L , 44 ); define
14 R0 = W [ P1 + -14 ] (Z); DBGA ( R0.L , 43 ); define
15 R0 = W [ P1 + -16 ] (Z); DBGA ( R0.L , 42 ); define
16 R0 = W [ P1 + -18 ] (Z); DBGA ( R0.L , 41 ); define
17 R0 = W [ P1 + -20 ] (Z); DBGA ( R0.L , 40 ); define
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| H A D | s11.s | 14 ASTAT = R0;
17 R0.L = 0x1000;
18 R0.H = 0x0000;
19 A0.w = R0;
20 R0.L = 0x0000;
21 A0.x = R0.L;
25 R0 = A0.w; define
26 DBGA ( R0.L , 0x2000 );
27 DBGA ( R0.H , 0x0000 );
28 R0.L = A0.x;
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| H A D | a2.s | 8 R0 = [ P0 + 0 ]; DBGA ( R0.L , 50 ); define
9 R0 = [ P0 + 4 ]; DBGA ( R0.L , 51 ); define
10 R0 = [ P0 + 8 ]; DBGA ( R0.L , 52 ); define
11 R0 = [ P0 + 12 ]; DBGA ( R0.L , 53 ); define
12 R0 = [ P0 + 16 ]; DBGA ( R0.L , 54 ); define
13 R0 = [ P0 + 20 ]; DBGA ( R0.L , 55 ); define
14 R0 = [ P0 + 24 ]; DBGA ( R0.L , 56 ); define
15 R0 = [ P0 + 28 ]; DBGA ( R0.L , 57 ); define
17 R0 = [ P0 + -4 ]; DBGA ( R0.L , 49 ); define
18 R0 = [ P0 + -8 ]; DBGA ( R0.L , 48 ); define
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| H A D | a11.S | 15 R0 = 0xfff0 (Z); define
16 R0.H = 0x7fff;
17 R7.L = R0 (RND);
18 R0 = ASTAT; define
20 CHECKREG R0, (_VS|_V|_V_COPY);
25 R0.L = 0xfff0;
26 R0.H = 0x7fff;
27 R7.H = R0 (RND);
28 R0 = ASTAT; define
30 CHECKREG R0, (_VS|_V|_V_COPY);
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| H A D | viterbi2.s | 43 R6 = 0; R0 = 0; // inits
45 R0.L = 0x0001;
46 R0.H = 0x0001;
47 [ P1 + 0 ] = R0;
48 R0.L = 0xffff;
49 R0.H = 0xffff;
50 [ P1 + 4 ] = R0;
51 R0.L = 0xffff;
52 R0.H = 0x0001;
53 [ P1 + 8 ] = R0;
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| H A D | se_regmv_usp_sysreg.S | 26 R0 = 0; define
27 SP = R0;
28 SYSCFG = R0;
32 R0 = 0x59c4 (Z); define
33 R0.H = 0x95a6;
34 USP = R0;
38 R0 = 0xd4a4 (Z); define
39 R0.H = 0xd16c;
40 USP = R0;
45 R0 = 0x2bca (Z); define
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| H A D | a0shift.S | 17 astat = R0;
23 R0.L = 0xc062;
24 R0.H = 0xffee;
25 A0.w = R0;
26 R0.L = 0xc52c;
27 A0.x = R0;
28 R0.L = 0x8d10;
29 R0.H = 0x34c;
30 A1.w = R0;
31 R0.L = 0xe10c;
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| H A D | se_lsetup_kill.S | 68 [ P0 ++ ] = R0;
70 [ P0 ++ ] = R0;
72 [ P0 ++ ] = R0;
74 [ P0 ++ ] = R0;
75 [ P0 ++ ] = R0; // IVT4 not used
77 [ P0 ++ ] = R0;
79 [ P0 ++ ] = R0;
81 [ P0 ++ ] = R0;
83 [ P0 ++ ] = R0;
85 [ P0 ++ ] = R0;
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| H A D | a21.s | 9 R0 = 0xffffffff; define
10 A0.w = R0;
11 A1.w = R0;
12 R0 = 0x7f (X); define
13 A0.x = R0;
14 A1.x = R0;
20 R0 = 0; define
21 A0.w = R0;
22 A1.w = R0;
23 R0 = 0x80 (X); define
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| H A D | s16.s | 10 R0.L = 0xdead;
11 R0.H = 0x1234;
14 R7 = DEPOSIT( R0, R1 );
18 R0.L = 0xdead;
19 R0.H = 0x1234;
22 R7 = DEPOSIT( R0, R1 );
26 R0.L = 0xdead;
27 R0.H = 0x1234;
30 R7 = DEPOSIT( R0, R1 );
34 R0.L = 0xdead;
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| H A D | b0.S | 7 R0 = 0; define
8 ASTAT = R0;
10 CC = R0 == R0;
14 R0 = ASTAT; CHECKREG R0, (_AC0|_AC0_COPY|_CC|_AZ); define
15 R0 = R0 + R0; define
16 R0 = ASTAT; CHECKREG R0, (_CC); define
19 R0 = ASTAT; CHECKREG R0, (_CC|_AN); define
20 R0 = - R0; define
21 R0 = ASTAT; CHECKREG R0, (_CC|_AN); define
25 R0 = ASTAT; CHECKREG R0, (_AC0|_CC|_AN); define
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| H A D | c_mode_user_superivsor.S | 53 [ P0 ++ ] = R0;
56 [ P0 ++ ] = R0;
59 [ P0 ++ ] = R0;
62 [ P0 ++ ] = R0;
64 [ P0 ++ ] = R0; // IVT4 not used
67 [ P0 ++ ] = R0;
70 [ P0 ++ ] = R0;
73 [ P0 ++ ] = R0;
76 [ P0 ++ ] = R0;
79 [ P0 ++ ] = R0;
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| H A D | load.s | 64 R0 = \preg0; define
65 CC = \dreg == R0;
69 R0 = [ \preg1\() ]; define
71 CC = \dreg == R0;
85 load32 0 R0 R1
86 load32 0xFFFFFFFF R0 R1
89 load32 0x12345678 R0 R2
90 load32 0x23456789 R0 R3
91 load32 0x3456789a R0 R4
92 load32 0x456789ab R0 R5
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| H A D | s15.s | 10 R0.L = 0xdead;
11 R0.H = 0x1234;
13 R7 = EXTRACT( R0, R1.L ) (Z);
17 R0.L = 0xdead;
18 R0.H = 0x1234;
20 R7 = EXTRACT( R0, R1.L ) (Z);
24 R0.L = 0xdead;
25 R0.H = 0x1234;
27 R7 = EXTRACT( R0, R1.L ) (Z);
31 R0.L = 0xfff1;
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| H A D | c_dsp32alu_mix.s | 8 R0 = 0; define
9 ASTAT = R0;
24 R2 = R1 + R0 (NS); /* 0xACF13578 */
25 R3 = R2 + R0 (NS); /* 0xACF13578 */
28 R2 = R1 + R0 (S); /* 0x7FFFFFFF */
29 R3 = R1 - R0 (NS); /* 0x22222222 */
30 R4.L = R1.L + R0.L (NS); /* 0x88883578 */
31 R5.L = R1.L + R0.H (NS); /* 0xAAAAF134 */
32 R6.L = R1.H + R0.L (NS); /* 0xCCCCF134 */
33 R7.L = R1.H + R0.H (NS); /* 0xEEEEACF0 */
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| H A D | s21.s | 8 ASTAT = R0;
14 R0.L = 0x0001;
15 R0.H = 0x8000;
19 A0.w = R0;
34 R0.L = 0x0001;
35 R0.H = 0x0000;
38 A0.w = R0;
54 R0.L = 0x0001;
55 R0.H = 0x8000;
58 A0.w = R0;
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| H A D | stk6.s | 23 DBGA ( R0.L , 1 );
31 R0 = P0; DBGA ( R0.L , 9 ); define
32 R0 = P1; DBGA ( R0.L , 10 ); define
33 R0 = P2; DBGA ( R0.L , 11 ); define
34 R0 = P3; DBGA ( R0.L , 12 ); define
35 R0 = P4; DBGA ( R0.L , 13 ); define
36 R0 = P5; DBGA ( R0.L , 14 ); define
37 R0 = 1; define
42 DBGA ( R0.L , 1 );
50 R0 = P0; DBGA ( R0.L , 9 ); define
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| H A D | events.s | 11 R0 = 0; define
15 R0 += 1; # 1
16 R0 += 1;
17 R0 += 1; # 3
18 R0 += 1;
19 R0 += 1; # 5
20 R0 += 1;
21 R0 += 1; # 7
22 R0 += 1;
23 R0 += 1; # 9
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| H A D | PN_generator.s | 30 ASTAT = R0;
34 R0.L = 0x1cd4;
35 R0.H = 0xab18;
36 A1.w = R0;
37 R0.L = 0x008d;
38 A1.x = R0.L;
41 R0.L = 0x0001;
42 R0.H = 0x0000;
43 A0.w = R0;
44 R0.L = 0x0000;
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| H A D | s30.s | 10 R0.L = 0xffff;
11 R0.H = 0x0000;
12 A0.w = R0;
13 R0.L = 0x0000;
14 A0.x = R0;
28 R0.L = 0x0000;
29 R0.H = 0xffff;
30 A0.w = R0;
31 R0.L = 0x00ff;
32 A0.x = R0;
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| H A D | s13.s | 10 R0 = 0; define
11 ASTAT = R0;
12 R0.L = 0x1;
13 R0.H = 0x1;
15 R7.L = ASHIFT R0.L BY R5.L;
24 R0 = 0; define
25 ASTAT = R0;
26 R0.L = 0x8000;
27 R0.H = 0x1;
30 R7.L = ASHIFT R0.L BY R5.L;
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| H A D | s9.s | 10 R0 = 0; define
11 ASTAT = R0;
12 R0.L = 0x1;
13 R0.H = 0x1;
14 R7.L = R0.L << 4;
23 R0 = 0; define
24 ASTAT = R0;
25 R0.L = 0x8000;
26 R0.H = 0x1;
27 R7.L = R0.L >>> 4;
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| H A D | issue139.S | 7 R0 = 0; define
15 ASTAT = R0;
16 R0.L = 0x33;
17 R0.H = 0x55;
20 R7 = R1 +|+ R0, R6 = R1 -|- R0 (SCO , ASR);
30 R0 = 0; define
38 R0.L = 0x33;
39 R0.H = 0x55;
42 R3 = R1 +|+ R0, R2 = R1 -|- R0 (ASR);
49 R0 = 0; define
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/bfin/ |
| H A D | lib1funcs.S | 36 R2 = -R0;
37 CC = R0 < 0;
38 IF CC R0 = R2;
50 R1 = -R0;
51 IF CC R0 = R1;
65 [--SP] = R0;
70 R2 *= R0;
71 R0 = R1 - R2; define
89 R0 = ROT R0 BY 1; define
98 R0 = ROT R0 BY 1; define
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/bfin/ |
| H A D | lib1funcs.S | 36 R2 = -R0;
37 CC = R0 < 0;
38 IF CC R0 = R2;
50 R1 = -R0;
51 IF CC R0 = R1;
65 [--SP] = R0;
70 R2 *= R0;
71 R0 = R1 - R2; define
89 R0 = ROT R0 BY 1; define
98 R0 = ROT R0 BY 1; define
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