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Searched refs:PSR_SVC32_MODE (Results 1 – 19 of 19) sorted by relevance

/netbsd-src/sys/arch/arm/arm32/
H A Dlocore.S154 cpsid if, #PSR_SVC32_MODE
158 orr r2, r2, #(PSR_SVC32_MODE)
H A Dgenassym.cf159 #define PSR_SVC32_MODE PSR_SVC32_MODE
H A Dfault.c698 tf->tf_spsr |= PSR_SVC32_MODE; in dab_buserr()
/netbsd-src/sys/arch/arm/include/arm32/
H A Dframe.h283 cmp r0, #(PSR_SVC32_MODE) ;\
438 SET_CPSR_MODE(r2, PSR_SVC32_MODE)
443 cmp r2, #(PSR_SVC32_MODE); /* were we in SVC mode? */ \
/netbsd-src/sys/arch/hpcarm/hpcarm/
H A Dlocore.S60 orr r4, r4, #(PSR_SVC32_MODE)
198 orr r2, r2, #(PSR_SVC32_MODE)
/netbsd-src/sys/arch/arm/ofw/
H A Dofw_irq.S444 mov r1, #(I32_bit | PSR_SVC32_MODE)
450 orr r3, r3, #(PSR_SVC32_MODE)
/netbsd-src/sys/arch/arm/arm/
H A Dfiq_subr.S58 cps #PSR_SVC32_MODE
H A Dcpufunc.c2047 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in early_abort_fixup()
2124 (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) in early_abort_fixup()
2138 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in early_abort_fixup()
2187 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in late_abort_fixup()
2243 (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) in late_abort_fixup()
2314 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in late_abort_fixup()
H A Darmv6_start.S647 orr r0, r0, #(PSR_SVC32_MODE)
656 cpsid if, #PSR_SVC32_MODE // SVC32 with no interrupts
/netbsd-src/sys/arch/evbarm/imx31/
H A Dimx31lk_start.S51 cpsid if, #PSR_SVC32_MODE
/netbsd-src/sys/arch/evbarm/mpcsa/
H A Dmpcsa_start.S79 msr CPSR_c,#I32_bit | F32_bit | PSR_SVC32_MODE
/netbsd-src/sys/arch/evbarm/stand/board/
H A Ds3c2410_vector.S68 orr r0, r0, #(I32_bit|F32_bit|PSR_SVC32_MODE)
H A Ds3c2800_vector.S100 orr r0, r0, #(I32_bit|F32_bit|PSR_SVC32_MODE)
/netbsd-src/sys/arch/evbarm/armadaxp/
H A Darmadaxp_start.S69 cpsid if, #PSR_SVC32_MODE
/netbsd-src/sys/arch/arm/xscale/
H A Dpxa2x0_apm_asm.S193 mov r1, #(PSR_SVC32_MODE | I32_bit | F32_bit)
375 mov r1, #(PSR_SVC32_MODE | I32_bit | F32_bit)
/netbsd-src/sys/arch/acorn32/stand/boot32/
H A Dstart.S238 orr r6, r6, #PSR_SVC32_MODE /* go to 32 bit supervisor mode */
/netbsd-src/sys/arch/evbarm/gemini/
H A Dgemini_start.S127 orr r0, r0, #(I32_bit | F32_bit | PSR_SVC32_MODE)
/netbsd-src/sys/arch/evbarm/armadillo/
H A Darmadillo9_start.S43 mov r0, #(PSR_SVC32_MODE | I32_bit | F32_bit)
/netbsd-src/sys/arch/arm/include/
H A Darmreg.h88 #define PSR_SVC32_MODE 0x00000013 macro