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Searched refs:N_REG_CLASSES (Results 1 – 25 of 143) sorted by relevance

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/netbsd-src/external/gpl3/gcc.old/dist/gcc/
H A Dira.h48 enum reg_class x_ira_allocno_classes[N_REG_CLASSES];
53 enum reg_class x_ira_allocno_class_translate[N_REG_CLASSES];
61 enum reg_class x_ira_pressure_classes[N_REG_CLASSES];
67 enum reg_class x_ira_pressure_class_translate[N_REG_CLASSES];
76 unsigned char x_ira_reg_class_max_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
77 unsigned char x_ira_reg_class_min_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
80 short x_ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
85 short x_ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
89 int x_ira_class_hard_regs_num[N_REG_CLASSES];
94 int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
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H A Dira-int.h71 typedef unsigned short move_table[N_REG_CLASSES];
125 int reg_pressure[N_REG_CLASSES];
831 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
835 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
838 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
843 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
849 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
863 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
870 enum reg_class x_ira_important_classes[N_REG_CLASSES];
875 int x_ira_important_class_nums[N_REG_CLASSES];
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H A Dhard-reg-set.h429 HARD_REG_SET x_reg_class_contents[N_REG_CLASSES];
433 bool x_class_only_fixed_regs[N_REG_CLASSES];
436 unsigned int x_reg_class_size[N_REG_CLASSES];
439 enum reg_class x_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
443 enum reg_class x_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
447 enum reg_class x_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
H A Dreginfo.c109 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
151 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets()
243 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
261 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
263 for (j = 0; j < N_REG_CLASSES; j++) in init_reg_sets_1()
269 for (k = 0; k < N_REG_CLASSES; k++) in init_reg_sets_1()
283 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
285 for (j = 0; j < N_REG_CLASSES; j++) in init_reg_sets_1()
291 for (k = 0; k < N_REG_CLASSES; k++) in init_reg_sets_1()
302 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
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H A Dira.c472 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_hard_regs()
535 for (i = 0; i < N_REG_CLASSES; i++) in setup_reg_subclasses()
536 for (j = 0; j < N_REG_CLASSES; j++) in setup_reg_subclasses()
539 for (i = 0; i < N_REG_CLASSES; i++) in setup_reg_subclasses()
547 for (j = 0; j < N_REG_CLASSES; j++) in setup_reg_subclasses()
575 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
603 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
604 for (cl2 = (int) N_REG_CLASSES - 1; cl2 >= 0; cl2--) in setup_class_subset_and_memory_move_costs()
623 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
786 enum reg_class pressure_classes[N_REG_CLASSES]; in setup_pressure_classes()
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H A Dregs.h216 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
220 char x_contains_allocatable_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
H A Dloop-invariant.c67 int max_reg_pressure[N_REG_CLASSES];
1307 unsigned aregs_needed[N_REG_CLASSES]; in get_inv_cost()
1540 unsigned aregs_needed[N_REG_CLASSES], invno; in best_gain_for_invariant()
1608 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; in find_invariants_to_move()
1989 static int curr_reg_pressure[N_REG_CLASSES];
/netbsd-src/external/gpl3/gcc/dist/gcc/
H A Dira.h48 enum reg_class x_ira_allocno_classes[N_REG_CLASSES];
53 enum reg_class x_ira_allocno_class_translate[N_REG_CLASSES];
61 enum reg_class x_ira_pressure_classes[N_REG_CLASSES];
67 enum reg_class x_ira_pressure_class_translate[N_REG_CLASSES];
76 unsigned char x_ira_reg_class_max_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
77 unsigned char x_ira_reg_class_min_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
80 short x_ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
85 short x_ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
89 int x_ira_class_hard_regs_num[N_REG_CLASSES];
94 int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
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H A Dhard-reg-set.h431 HARD_REG_SET x_reg_class_contents[N_REG_CLASSES];
435 bool x_class_only_fixed_regs[N_REG_CLASSES];
438 unsigned int x_reg_class_size[N_REG_CLASSES];
441 enum reg_class x_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
445 enum reg_class x_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
449 enum reg_class x_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
H A Dira-int.h71 typedef unsigned short move_table[N_REG_CLASSES];
125 int reg_pressure[N_REG_CLASSES];
841 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
845 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
848 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
853 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
859 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
873 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
880 enum reg_class x_ira_important_classes[N_REG_CLASSES];
885 int x_ira_important_class_nums[N_REG_CLASSES];
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H A Dreginfo.cc112 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
172 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets()
264 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
282 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
284 for (j = 0; j < N_REG_CLASSES; j++) in init_reg_sets_1()
290 for (k = 0; k < N_REG_CLASSES; k++) in init_reg_sets_1()
304 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
306 for (j = 0; j < N_REG_CLASSES; j++) in init_reg_sets_1()
312 for (k = 0; k < N_REG_CLASSES; k++) in init_reg_sets_1()
323 for (i = 0; i < N_REG_CLASSES; i++) in init_reg_sets_1()
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H A Dira.cc472 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_hard_regs()
535 for (i = 0; i < N_REG_CLASSES; i++) in setup_reg_subclasses()
536 for (j = 0; j < N_REG_CLASSES; j++) in setup_reg_subclasses()
539 for (i = 0; i < N_REG_CLASSES; i++) in setup_reg_subclasses()
547 for (j = 0; j < N_REG_CLASSES; j++) in setup_reg_subclasses()
575 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
603 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
604 for (cl2 = (int) N_REG_CLASSES - 1; cl2 >= 0; cl2--) in setup_class_subset_and_memory_move_costs()
623 for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--) in setup_class_subset_and_memory_move_costs()
786 enum reg_class pressure_classes[N_REG_CLASSES]; in setup_pressure_classes()
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H A Dregs.h219 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
223 char x_contains_allocatable_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
H A Dloop-invariant.cc67 int max_reg_pressure[N_REG_CLASSES];
1317 unsigned aregs_needed[N_REG_CLASSES]; in get_inv_cost()
1550 unsigned aregs_needed[N_REG_CLASSES], invno; in best_gain_for_invariant()
1618 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; in find_invariants_to_move()
1997 static int curr_reg_pressure[N_REG_CLASSES];
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/pa/
H A Dpa64-regs.h210 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
H A Dpa32-regs.h274 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc/dist/gcc/config/pa/
H A Dpa64-regs.h210 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
H A Dpa32-regs.h274 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc/dist/gcc/config/moxie/
H A Dmoxie.h150 #define N_REG_CLASSES LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/moxie/
H A Dmoxie.h150 #define N_REG_CLASSES LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc/dist/gcc/config/or1k/
H A Dor1k.h209 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/bpf/
H A Dbpf.h183 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc/dist/gcc/config/bpf/
H A Dbpf.h183 #define N_REG_CLASSES (int) LIM_REG_CLASSES macro
/netbsd-src/external/gpl3/gcc/dist/gcc/config/stormy16/
H A Dstormy16.h156 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) macro
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/stormy16/
H A Dstormy16.h156 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) macro

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