Searched refs:DDIVU (Results 1 – 9 of 9) sorted by relevance
/netbsd-src/sys/arch/mips/mips/ |
H A D | bds_emul.S | 303 PTR_WORD bcemul_sigill # 037 DDIVU (*) 308 PTR_WORD bcemul_special_genmultdiv # 037 DDIVU (*) 401 jr ra; ddivu $0, v0, v1 # 037 DDIVU
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | Mips64r6InstrInfo.td | 142 def DDIVU : DDIVU_ENC, DDIVU_DESC, ISA_MIPS64R6;
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H A D | MipsScheduleGeneric.td | 269 def : InstRW<[GenericWriteDIVU], (instrs DDIVU, DMODU)>;
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H A D | MipsISelLowering.cpp | 1416 case Mips::DDIVU: in EmitInstrWithCustomInserter()
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/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/ |
H A D | sljitNativeMIPS_common.c | 121 #define DDIVU (HI(0) | LO(31)) macro 1049 …FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DDIVU : DDIV) | S(SLJIT_R0) | T(SLJIT_R1… in sljit_emit_op0()
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/netbsd-src/external/gpl3/gdb/dist/sim/mips/ |
H A D | m16.igen | 1021 11101,3.RX,3.RY,11111:RR:16::DDIVU
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H A D | mips3264r6.igen | 968 000000,5.RS,5.RT,5.RD,00010,011111:POOL32X:64::DDIVU
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H A D | ChangeLog-2021 | 1805 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL, 2120 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 2083 case Mips::DDIVU: in processInstruction()
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