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Searched refs:CPU_CONTROL_MMU_ENABLE (Results 1 – 25 of 37) sorted by relevance

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/netbsd-src/sys/arch/arm/arm/
H A Dcpufunc.c2434 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm6_setup()
2438 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm6_setup()
2485 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm7_setup()
2489 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm7_setup()
2534 cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm7tdmi_setup()
2574 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm8_setup()
2578 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm8_setup()
2656 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm9_setup()
2660 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE in arm9_setup()
2709 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE in arm10_setup()
[all …]
/netbsd-src/sys/arch/evbarm/iq80310/
H A Diq80310_start.S54 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
127 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/iq80321/
H A Diq80321_start.S60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
136 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/lubbock/
H A Dlubbock_start.S103 tst r2, #CPU_CONTROL_MMU_ENABLE /* we already have a page table? */
132 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/g42xxeb/
H A Dg42xxeb_start.S103 tst r2, #CPU_CONTROL_MMU_ENABLE /* we already have a page table? */
132 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/nslu2/
H A Dnslu2_start.S56 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
151 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/smdk2xx0/
H A Dsmdk2800_start.S106 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
136 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
H A Dsmdk2410_start.S134 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
164 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/ixdp425/
H A Dixdp425_start.S60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
155 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/tsarm/
H A Dtsarm_start.S57 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
171 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/ixm1200/
H A Dixm1200_start.S63 bic r0, r0, #CPU_CONTROL_MMU_ENABLE
161 orr r1, r1, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/adi_brh/
H A Dbrh_start.S70 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
174 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/armadaxp/
H A Darmadaxp_start.S73 movw r1, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\
120 | CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
/netbsd-src/sys/arch/evbarm/stand/boot2440/
H A Dentry.S81 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
111 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/hdl_g/
H A Dhdlg_start.S60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
179 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/marvell/
H A Dmarvell_start.S244 biceq r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE)
248 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/armadillo/
H A Darmadillo9_start.S61 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
144 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/zaurus/zaurus/
H A Dzaurus_start.S90 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
H A Dkloader_zaurus.S68 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/netwinder/netwinder/
H A Dnwmmu.S113 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/stand/gzboot/
H A Dsrtbegin.S50 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/hpcarm/hpcarm/
H A Dkloader_pxa2x0.S55 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/mmnet/
H A Dmmnet_start.S157 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/mpcsa/
H A Dmpcsa_start.S137 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/evbarm/stand/board/
H A Ds3c2410_vector.S73 ldr r0, =(CPU_CONTROL_MMU_ENABLE|CPU_CONTROL_DC_ENABLE|CPU_CONTROL_IC_ENABLE)

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