| /llvm-project/llvm/test/CodeGen/PowerPC/ |
| H A D | vec_conv_fp64_to_i16_elts.ll | 296 ; CHECK-P8-NEXT: lxvd2x vs9, r4, r6
311 ; CHECK-P8-NEXT: xxswapd vs10, vs9
486 ; CHECK-BE-NEXT: xxperm vs7, vs9, vs8
494 ; CHECK-BE-NEXT: xxperm vs6, vs9, vs8
503 ; CHECK-BE-NEXT: xxperm vs5, vs9, vs8
511 ; CHECK-BE-NEXT: xxperm vs4, vs9, vs8
528 ; CHECK-BE-NEXT: xxperm vs3, vs9, vs8
843 ; CHECK-P8-NEXT: lxvd2x vs9, r4, r6
858 ; CHECK-P8-NEXT: xxswapd vs10, vs9
1033 ; CHECK-BE-NEXT: xxperm vs7, vs9, vs
[all...] |
| H A D | vector-reduce-fadd.ll | 2273 ; PWR9LE-NEXT: lxv vs9, 384(r1)
2345 ; PWR9LE-NEXT: xxswapd vs11, vs9
2351 ; PWR9LE-NEXT: xxswapd vs9, vs7
2391 ; PWR9BE-NEXT: lxv vs9, 400(r1)
2465 ; PWR9BE-NEXT: xxswapd vs9, vs9
2512 ; PWR10LE-NEXT: lxv vs9, 384(r1)
2583 ; PWR10LE-NEXT: xxswapd vs11, vs9
2589 ; PWR10LE-NEXT: xxswapd vs9, vs7
2631 ; PWR10BE-NEXT: lxv vs9, 40
[all...] |
| H A D | ppc64-acc-regalloc.ll | 61 ; CHECK-NEXT: xxlor vs9, vs11, vs11
100 ; CHECK-NEXT: stxv vs9, 32(r3)
153 ; TRACKLIVE-NEXT: xxlor vs9, vs11, vs11
192 ; TRACKLIVE-NEXT: stxv vs9, 32(r3)
|
| H A D | vec_conv_fp64_to_i8_elts.ll | 313 ; CHECK-P8-NEXT: lxvd2x vs9, r3, r4
339 ; CHECK-P8-NEXT: xxswapd vs11, vs9
499 ; CHECK-BE-NEXT: xxperm v2, vs9, vs8
868 ; CHECK-P8-NEXT: lxvd2x vs9, r3, r4
894 ; CHECK-P8-NEXT: xxswapd vs11, vs9
1054 ; CHECK-BE-NEXT: xxperm v2, vs9, vs8
|
| H A D | vec_conv_fp32_to_i16_elts.ll | 364 ; CHECK-P8-NEXT: xxsldwi vs9, v5, v5, 1
396 ; CHECK-P8-NEXT: xscvspdpn f1, vs9
598 ; CHECK-BE-NEXT: xxperm vs2, vs9, vs0
996 ; CHECK-P8-NEXT: xxsldwi vs9, v5, v5, 1
1028 ; CHECK-P8-NEXT: xscvspdpn f1, vs9
1230 ; CHECK-BE-NEXT: xxperm vs2, vs9, vs0
|
| H A D | spill-vec-pair.ll | 157 …~{memory},~{vs0},~{vs1},~{vs2},~{vs3},~{vs4},~{vs5},~{vs6},~{vs7},~{vs8},~{vs9},~{vs10},~{vs11},~{…
|
| H A D | vec_conv_fp32_to_i8_elts.ll | 382 ; CHECK-P8-NEXT: xxsldwi vs9, v5, v5, 1
409 ; CHECK-P8-NEXT: xscvspdpn f1, vs9
1022 ; CHECK-P8-NEXT: xxsldwi vs9, v5, v5, 1
1049 ; CHECK-P8-NEXT: xscvspdpn f1, vs9
|
| H A D | mma-intrinsics.ll | 415 ; CHECK-NEXT: stxv vs9, 32(r8)
462 ; CHECK-BE-NEXT: stxv vs9, 16(r8)
|
| H A D | vector-lrint.ll | 1810 ; FAST-NEXT: xxmrghd v6, vs9, vs8
2362 ; BE-NEXT: lxvd2x vs9, 0, r3
2388 ; BE-NEXT: stxvd2x vs9, r30, r3
3549 ; FAST-NEXT: xxmrghd v0, vs9, vs8
4341 ; FAST-NEXT: xxsldwi vs9, v5, v5, 3
4400 ; FAST-NEXT: xscvspdpn f0, vs9
|
| H A D | vector-llrint.ll | 1799 ; FAST-NEXT: xxmrghd v6, vs9, vs8
2351 ; BE-NEXT: lxvd2x vs9, 0, r3
2377 ; BE-NEXT: stxvd2x vs9, r30, r3
3538 ; FAST-NEXT: xxmrghd v0, vs9, vs8
4330 ; FAST-NEXT: xxsldwi vs9, v5, v5, 3
4389 ; FAST-NEXT: xscvspdpn f0, vs9
|
| /llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterInfos_ppc64le.h | 218 DEFINE_VSX(vs9, LLDB_INVALID_REGNUM), \
403 uint32_t vs9[4]; member
|