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Searched refs:vs10 (Results 1 – 11 of 11) sorted by relevance

/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dppc64-acc-regalloc.ll39 ; CHECK-NEXT: xxlor vs10, v2, v2
41 ; CHECK-NEXT: xxlor vs8, vs10, vs10
42 ; CHECK-NEXT: xxlor vs10, v1, v1
131 ; TRACKLIVE-NEXT: xxlor vs10, v2, v2
133 ; TRACKLIVE-NEXT: xxlor vs8, vs10, vs10
134 ; TRACKLIVE-NEXT: xxlor vs10, v1, v1
H A Dvector-reduce-fadd.ll2272 ; PWR9LE-NEXT: lxv vs10, 368(r1)
2342 ; PWR9LE-NEXT: xxswapd vs12, vs10
2348 ; PWR9LE-NEXT: xxswapd vs10, vs8
2390 ; PWR9BE-NEXT: lxv vs10, 384(r1)
2462 ; PWR9BE-NEXT: xxswapd vs10, vs10
2510 ; PWR10LE-NEXT: lxv vs10, 368(r1)
2580 ; PWR10LE-NEXT: xxswapd vs12, vs10
2586 ; PWR10LE-NEXT: xxswapd vs10, vs8
2628 ; PWR10BE-NEXT: lxv vs10, 38
[all...]
H A Dvec_conv_fp32_to_i16_elts.ll365 ; CHECK-P8-NEXT: xxsldwi vs10, v4, v4, 3
400 ; CHECK-P8-NEXT: xscvspdpn f0, vs10
551 ; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
561 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
605 ; CHECK-BE-NEXT: xxperm vs10, vs11, vs0
616 ; CHECK-BE-NEXT: xxmrghw vs1, vs1, vs10
997 ; CHECK-P8-NEXT: xxsldwi vs10, v4, v4, 3
1032 ; CHECK-P8-NEXT: xscvspdpn f0, vs10
1183 ; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
1193 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
[all...]
H A Dspill-vec-pair.ll157 …},~{vs0},~{vs1},~{vs2},~{vs3},~{vs4},~{vs5},~{vs6},~{vs7},~{vs8},~{vs9},~{vs10},~{vs11},~{vs12},~{…
H A Dvec_conv_fp32_to_i8_elts.ll385 ; CHECK-P8-NEXT: xxsldwi vs10, v4, v4, 3
416 ; CHECK-P8-NEXT: xscvspdpn f0, vs10
1025 ; CHECK-P8-NEXT: xxsldwi vs10, v4, v4, 3
1056 ; CHECK-P8-NEXT: xscvspdpn f0, vs10
H A Dmma-intrinsics.ll416 ; CHECK-NEXT: stxv vs10, 16(r8)
465 ; CHECK-BE-NEXT: stxv vs10, 32(r8)
H A Dvec_conv_fp64_to_i16_elts.ll311 ; CHECK-P8-NEXT: xxswapd vs10, vs9
858 ; CHECK-P8-NEXT: xxswapd vs10, vs9
H A Dvec_conv_fp64_to_i8_elts.ll328 ; CHECK-P8-NEXT: xxswapd vs10, vs6
883 ; CHECK-P8-NEXT: xxswapd vs10, vs6
H A Dvector-lrint.ll1816 ; FAST-NEXT: xxmrghd v7, vs0, vs10
2364 ; BE-NEXT: lxvd2x vs10, 0, r3
2386 ; BE-NEXT: stxvd2x vs10, r30, r3
3502 ; FAST-NEXT: xxmrghd v2, v2, vs10
3568 ; FAST-NEXT: xxmrghd v6, vs10, vs7
4342 ; FAST-NEXT: xxswapd vs10, v5
4401 ; FAST-NEXT: xscvspdpn f1, vs10
H A Dvector-llrint.ll1805 ; FAST-NEXT: xxmrghd v7, vs0, vs10
2353 ; BE-NEXT: lxvd2x vs10, 0, r3
2375 ; BE-NEXT: stxvd2x vs10, r30, r3
3491 ; FAST-NEXT: xxmrghd v2, v2, vs10
3557 ; FAST-NEXT: xxmrghd v6, vs10, vs7
4331 ; FAST-NEXT: xxswapd vs10, v5
4390 ; FAST-NEXT: xscvspdpn f1, vs10
/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_ppc64le.h219 DEFINE_VSX(vs10, LLDB_INVALID_REGNUM), \
404 uint32_t vs10[4]; member