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Searched refs:ummla (Results 1 – 23 of 23) sorted by relevance

/llvm-project/llvm/test/MC/AArch64/SVE/
H A Dmatrix-multiply-int8-diagnostics.s8 ummla z0.h, z1.b, z2.b label
10 ummla z0.s, z1.h, z2.b label
12 ummla z0.s, z1.b, z2.d label
18 ummla z0.s, z1.b, z2.b label
H A Dmatrix-multiply-int8.s14 ummla z0.s, z1.b, z2.b label
40 ummla z0.s, z1.b, z2.b label
/llvm-project/llvm/test/CodeGen/ARM/
H A Darm-matmul.ll11 define <4 x i32> @ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) {
13 ; CHECK-LABEL: ummla.v4i32.v16i8
15 …%vmmla1.i = tail call <4 x i32> @llvm.arm.neon.ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x…
80 declare <4 x i32> @llvm.arm.neon.ummla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2
/llvm-project/llvm/test/CodeGen/AArch64/
H A Daarch64-matmul.ll11 define <4 x i32> @ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) {
13 ; CHECK-LABEL: ummla.v4i32.v16i8
14 ; CHECK: ummla v0.4s, v1.16b, v2.16b
15 …%vmmla1.i = tail call <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <…
132 declare <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2
H A Dsve-intrinsics-matmul-int8.ll14 define <vscale x 4 x i32> @ummla(<vscale x 4 x i32> %r, <vscale x 16 x i8> %a, <vscale x 16 x i8> %…
15 ; CHECK-LABEL: ummla:
17 ; CHECK-NEXT: ummla z0.s, z1.b, z2.b
20 …%val = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ummla.nxv4i32(<vscale x 4 x i32> %r, <vscale…
126 declare <vscale x 4 x i32> @llvm.aarch64.sve.ummla.nxv4i32(<vscale x 4 x i32>, <vscale x 16 x i8>, …
/llvm-project/mlir/test/Dialect/ArmNeon/
H A Droundtrip.mlir48 // CHECK: arm_neon.intr.ummla {{.*}}: vector<16xi8> to vector<4xi32>
49 %0 = arm_neon.intr.ummla %c, %a, %b : vector<16xi8> to vector<4xi32>
H A Dinvalid.mlir61 %0 = arm_neon.intr.ummla %a, %b, %c : vector<16xi4> to vector<4xi32>
71 %0 = arm_neon.intr.ummla %a, %b, %c : vector<32xi8> to vector<8xi32>
/llvm-project/llvm/test/MC/AArch64/
H A Darmv8.6a-simd-matmul.s6 ummla v1.4s, v16.16b, v31.16b label
/llvm-project/mlir/test/Target/LLVMIR/
H A Darm-neon.mlir66 // CHECK: <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32
67 %0 = "arm_neon.intr.ummla"(%arg2, %arg0, %arg1) :
H A Darm-sve.mlir44 // CHECK: call <vscale x 4 x i32> @llvm.aarch64.sve.ummla.nxv4i32(<vscale x 4
45 %0 = "arm_sve.intr.ummla"(%arg2, %arg0, %arg1) :
/llvm-project/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.6a-simd-matmul.txt9 # CHECK: ummla v1.4s, v16.16b, v31.16b
/llvm-project/mlir/test/Dialect/ArmSVE/
H A Droundtrip.mlir39 // CHECK: arm_sve.ummla {{.*}}: vector<[16]xi8> to vector<[4]xi3
40 %0 = arm_sve.ummla %c, %a, %b :
H A Dlegalize-for-llvm.mlir43 // CHECK: arm_sve.intr.ummla
44 %0 = arm_sve.ummla %c, %a, %b :
/llvm-project/mlir/include/mlir/Dialect/ArmNeon/
H A DArmNeon.td162 def UmmlaOp : ArmNeon_OverloadedOperandsWithOneResultIntrOp<"ummla",[1], [
180 https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=ummla
/llvm-project/mlir/include/mlir/Dialect/ArmSVE/IR/
H A DArmSVE.td229 def UmmlaOp : ArmSVE_Op<"ummla",
513 ArmSVE_IntrBinaryOverloadedOp<"ummla">,
/llvm-project/llvm/test/tools/llvm-mca/AArch64/Neoverse/
H A DV2-neon-instructions.s1050 ummla v0.4s, v0.16b, v0.16b label
2288 # CHECK-NEXT: 1 3 0.25 ummla v0.4s, v0.16b, v0.16b
3545 # CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ummla v0.4s, v0.16b, v0.16b
H A DV1-neon-instructions.s1039 ummla v0.4s, v0.16b, v0.16b label
2266 # CHECK-NEXT: 1 3 0.25 ummla v0.4s, v0.16b, v0.16b
3510 # CHECK-NEXT: - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ummla v0.4s, v0.16b, v0.16b
H A DV1-sve-instructions.s2180 ummla z0.s, z1.b, z2.b label
4594 # CHECK-NEXT: 1 3 0.50 ummla z0.s, z1.b, z2.b
7025 # CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - ummla z0.s, z1.b, z2.b
H A DN2-sve-instructions.s3019 ummla z0.s, z1.b, z2.b label
6438 # CHECK-NEXT: 1 3 0.50 ummla z0.s, z1.b, z2.b
9869 … - - - - - - - - - 0.50 0.50 ummla z0.s, z1.b, z2.b
H A DV2-sve-instructions.s3024 ummla z0.s, z1.b, z2.b label
6448 # CHECK-NEXT: 1 3 0.25 ummla z0.s, z1.b, z2.b
9891 # CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ummla z0.s, z1.b, z2.b
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td3469 defm UMMLA_ZZZ : sve_int_matmul<0b11, "ummla", int_aarch64_sve_ummla>;
H A DAArch64InstrInfo.td1487 def UMMLA : SIMDThreeSameVectorMatMul<0, 1, "ummla", int_aarch64_neon_ummla>;
/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/
H A DA510-sve-instructions.s3019 ummla z0.s, z1.b, z2.b label
6438 # CHECK-NEXT: 1 4 0.50 ummla z0.s, z1.b, z2.b
9870 … - - - - - - - - 0.50 0.50 - ummla z0.s, z1.b, z2.b