tablegen\-mode\-syntax\-table (reference) in projects: llvm-project

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched +refs:tablegen +refs:mode +refs:syntax +refs:table (Results 1 – 5 of 5) sorted by relevance

/llvm-project/llvm/include/llvm/Target/
H A D	Target.td	1 //===- Target.td - Target Independent TableGen interface ---- tablegen --===// 24 // A string representing subtarget features that turn on this HW mode. 25 // For example, "+feat1,-feat2" will indicate that the mode is active 32 // A list of predicates that turn on this HW mode. 36 // A special mode recognized by tablegen. This mode is considered active 37 // when no other mode is active. For targets that do not use specific hw 38 // modes, this is the only mode. 54 // dependent on a HW mode [all...]
/llvm-project/clang/include/clang/Basic/
H A D	LangOptions.def	91 LANGOPT(MSVCCompat , 1, 0, "Microsoft Visual C++ full compatibility mode") 92 LANGOPT(Kernel , 1, 0, "Kernel mode") 123 BENIGN_LANGOPT(AsmPreprocessor, 1, 0, "preprocessor in asm mode") 180 LANGOPT(AArch64JumpTableHardening, 1, 0, "use hardened lowering for jump-table dispatch") 194 COMPATIBLE_LANGOPT(CPlusPlusModules, 1, 0, "C++ modules syntax") 269 LANGOPT(OpenMPCUDAMode , 1, 0, "Generate code for OpenMP pragmas in SIMT/SPMD mode") 281 LANGOPT(OpenMPForceUSM , 1, 0, "Enable OpenMP unified shared memory mode via compiler.") 287 "Strict availability diagnostic mode for HLSL built-in functions.") 346 /// FP_CONTRACT mode (on/off/fast). 361 "compatibility mode fo [all...]
/llvm-project/clang/docs/
H A D	InternalsManual.rst	150 like ``missing semicolon`` over wording like ``syntax error`` (which is not 322 The parser is very unforgiving. A syntax error, even whitespace, will abort, 462 semicolon at the end of a statement or a use of deprecated syntax that is 544 mode. Instead of formatting and printing out the diagnostics, this 548 documentation for the ``-verify`` mode can be found at 668 Option definitions are processed by the ``-gen-opt-parser-defs`` tablegen 703 Next, declare the command line interface of the option in the tablegen file 749 New options are recognized by the ``clang`` driver mode if ``Visibility`` is 838 C++ code with simple, declarative tablegen annotations and it's being used for 847 uses key paths, which are declared in two steps. First, a tablegen definitio [all...]
/llvm-project/llvm/lib/Target/PowerPC/
H A D	PPCRegisterInfo.td	1 //===-- PPCRegisterInfo.td - The PowerPC Register File ------ tablegen --===// 317 // FP rounding mode: bits 30 and 31 of the FP status and control register 341 // This also helps setting the correct `NumOfGPRsSaved' in traceback table. 520 // In the default PowerPC assembler syntax, registers are specified simply 866 // A version of ptr_rc which excludes R0 (or X0 in 64-bit mode).
/llvm-project/llvm/lib/Target/AArch64/
H A D	AArch64InstrInfo.td	1 //=- AArch64InstrInfo.td - Describe the AArch64 Instructions -- tablegen --=// 245 // A subset of SVE(2) instructions are legal in Streaming SVE execution mode, 298 // A subset of NEON instructions are legal in Streaming SVE execution mode, 303 // A subset of NEON instructions are legal in Streaming SVE mode only with +sme2p2. 1211 // 32-bit jump table destination is actually only 2 instructions since we can 1212 // use the table itself as a PC-relative base. But optimization occurs after 1217 (ins GPR64:$table, GPR64:$entry, i32imm:$jti), []>, 1220 (ins GPR64:$table, GPR64:$entry, i32imm:$jti), []>, 1223 (ins GPR64:$table, GPR64:$entry, i32imm:$jti), []>, 1227 // A hardened but more expensive version of jump-table dispatc [all...]