| /llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRTargetMachine.cpp | 33 static StringRef getCPU(StringRef CPU) {
51 : CodeGenTargetMachineImpl(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, in AVRTargetMachine()
54 SubTarget(TT, std::string(getCPU(CPU)), std::string(FS), *this) { in AVRTargetMachine()
34 static StringRef getCPU(StringRef CPU) { getCPU() function
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| /llvm-project/llvm/tools/llvm-mca/ |
| H A D | PipelinePrinter.cpp | 48 json::Object SimParameters({{"-mcpu", STI.getCPU()}, in getJSONSimulationParameters()
83 StringRef MCPU = STI.getCPU(); in getJSONTargetInfo()
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| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 514 auto Existing = ArchSubtarget.find(std::string(STI->getCPU())); in completeHVXFeatures()
646 if (STI->getCPU().contains("t")) { in getArchVersion()
649 STI->getCPU().substr(0, STI->getCPU().size() - 1), FS); in getArchVersion()
651 ArchSubtarget[std::string(STI->getCPU())] = in getArchVersion()
682 return StringSwitch<unsigned>(STI.getCPU()) in isUnconditionalBranch()
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| H A D | HexagonMCDuplexInfo.cpp | 636 if (STI.getCPU().equals_insensitive("hexagonv5") || in isOrderedDuplexPair()
637 STI.getCPU().equals_insensitive("hexagonv55") || in isOrderedDuplexPair()
638 STI.getCPU().equals_insensitive("hexagonv60")) { in isOrderedDuplexPair()
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| /llvm-project/clang/lib/Basic/Targets/ |
| H A D | Mips.h | 180 const std::string &getCPU() const { return CPU; }
186 CPU = getCPU(); in initFeatureMap()
179 const std::string &getCPU() const { return CPU; } getCPU() function
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| H A D | LoongArch.h | 68 StringRef getCPU() const { return CPU; }
56 StringRef getCPU() const { return CPU; } getCPU() function
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| H A D | LoongArch.cpp | 202 StringRef ArchName = getCPU(); in getTargetDefines()
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| H A D | Mips.cpp | 62 return llvm::StringSwitch<unsigned>(getCPU()) in getISARev()
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| /llvm-project/llvm/lib/Target/AMDGPU/MCA/ |
| H A D | AMDGPUCustomBehaviour.cpp | 179 AMDGPU::IsaVersion IV = AMDGPU::getIsaVersion(STI.getCPU()); in computeWaitCnt()
242 AMDGPU::IsaVersion IV = AMDGPU::getIsaVersion(STI.getCPU()); in generateWaitCntInfo()
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| /llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUTargetStreamer.cpp | 368 IsaVersion IVersion = getIsaVersion(STI.getCPU()); in EmitAmdhsaKernelDescriptor()
705 return getElfMach(STI.getCPU()); in getEFlagsAMDPAL()
757 EFlagsV3 |= getElfMach(STI.getCPU()); in getEFlagsV4()
773 EFlagsV4 |= getElfMach(STI.getCPU()); in getEFlagsV6()
814 switch (parseArchAMDGCN(STI.getCPU())) { in EmitAMDKernelCodeT()
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| H A D | AMDGPUMCKernelDescriptor.cpp | 23 IsaVersion Version = getIsaVersion(STI->getCPU()); in getDefaultAmdhsaKernelDescriptor()
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| /llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldCheckerImpl.h | 58 StringRef getCPU() const { return CPU; } in getCPU() function
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| H A D | RuntimeDyldChecker.cpp | 300 auto TI = getTargetInfo(TT, Checker.getCPU(), Checker.getFeatures()); in evalDecodeOperand()
739 auto TI = getTargetInfo(TT, Checker.getCPU(), Checker.getFeatures()); in decodeInst()
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| /llvm-project/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | |
| H A D | Disassembler.h | 118 StringRef getCPU() const { return CPU; } in getCPU() function
|
| /llvm-project/llvm/include/llvm/ExecutionEngine/Orc/ |
| H A D | JITTargetMachineBuilder.h | 81 const std::string &getCPU() const { return CPU; } in getCPU() function
|
| /llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 900 auto Version = getIsaVersion(STI.getCPU()); in getWavefrontSize()
912 Processor = STI.getCPU().str(); in getLocalMemorySize()
1032 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMinNumSGPRs()
1045 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMaxNumSGPRs()
1055 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMaxNumSGPRs()
1066 IsaVersion Version = getIsaVersion(STI->getCPU()); in getNumExtraSGPRs()
1085 IsaVersion Version = getIsaVersion(STI->getCPU()); in getNumExtraSGPRs()
1103 IsaVersion Version = getIsaVersion(STI->getCPU());
1281 IsaVersion Version = getIsaVersion(STI->getCPU());
2136 auto Version = getIsaVersion(STI.getCPU()); in isGFX9Plus()
[all...] |
| /llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsAsmBackend.cpp | 603 : MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), false) {} in createMipsAsmBackend()
622 STI.getCPU(), Options);
623 return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(),
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| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMTargetStreamer.cpp | 132 if (STI.getCPU() == "xscale") in getArchForCPU()
179 const StringRef CPUString = STI.getCPU(); in emitTargetAttributes()
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURemoveIncompatibleFunctions.cpp | 166 StringRef GPUName = ST->getCPU(); in checkFunction()
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| H A D | AMDGPUMCInstLower.cpp | 285 if (!MI->isPseudo() && STI.isCPUStringValid(STI.getCPU()) && in emitInstruction()
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| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCSubtargetInfo.h | 111 StringRef getCPU() const { return CPU; }
109 StringRef getCPU() const { return CPU; } getCPU() function
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 223 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldReplaceInst()
294 std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldExitEarly()
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| /llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYELFStreamer.cpp | 180 StringRef CPU = STI.getCPU(); in emitTargetAttributes()
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| /llvm-project/llvm/bindings/ocaml/target/ |
| H A D | llvm_target.mli | 200 [llvm::TargetMachine::getCPU]. *)
|