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/llvm-project/llvm/test/CodeGen/X86/
H A DleaFixup32.mir17 ; where the base is rbp/r13/ebp register
22 ;test1add_ebp_32: 2 operands LEA32r where base register is ebp and can be replaced
34 ; where the base is ebp register
39 ;test1lea_ebp_32: 2 operands LEA32r wher base register is rbp/r13/ebp and can be replaced
52 ; where the base is rbp/r13/ebp register
58 ; where the base and the index are ebp register and there is offset
64 ; where the base and the index are ebp register and there is scale
90 - { reg: '$ebp' }
107 liveins: $eax, $ebp
110 ; CHECK: liveins: $eax, $ebp
[all …]
H A Dvec-strict-cmp-256.ll12 ; AVX-32-NEXT: pushl %ebp
13 ; AVX-32-NEXT: movl %esp, %ebp
16 ; AVX-32-NEXT: vcmpeqps 8(%ebp), %ymm2, %ymm2
18 ; AVX-32-NEXT: movl %ebp, %esp
19 ; AVX-32-NEXT: popl %ebp
30 ; AVX512-32-NEXT: pushl %ebp
31 ; AVX512-32-NEXT: movl %esp, %ebp
34 ; AVX512-32-NEXT: vcmpeqps 8(%ebp), %ymm2, %k1
36 ; AVX512-32-NEXT: movl %ebp, %esp
37 ; AVX512-32-NEXT: popl %ebp
[all …]
H A Dx86-32-intrcc.ll12 ; Stack is dyamically realigned to 16 bytes, and then reloaded to ebp - 4
17 ; CHECK-NEXT: pushl %ebp
18 ; CHECK-NEXT: movl %esp, %ebp
22 ; CHECK-NEXT: movl 12(%ebp), %eax
25 ; CHECK-NEXT: leal -4(%ebp), %esp
27 ; CHECK-NEXT: popl %ebp
32 ; CHECK0-NEXT: pushl %ebp
33 ; CHECK0-NEXT: movl %esp, %ebp
37 ; CHECK0-NEXT: leal 4(%ebp), %eax
41 ; CHECK0-NEXT: leal -4(%ebp),
[all...]
H A Dscalar-int-to-fp.ll52 ; SSE1_32-NEXT: pushl %ebp
53 ; SSE1_32-NEXT: movl %esp, %ebp
56 ; SSE1_32-NEXT: movl 8(%ebp), %eax
62 ; SSE1_32-NEXT: movl %ebp, %esp
63 ; SSE1_32-NEXT: popl %ebp
68 ; X87-NEXT: pushl %ebp
69 ; X87-NEXT: movl %esp, %ebp
72 ; X87-NEXT: movl 8(%ebp), %eax
76 ; X87-NEXT: movl %ebp, %esp
77 ; X87-NEXT: popl %ebp
[all …]
H A Dmemset-sse-stack-realignment.ll14 ; NOSSE-NEXT: pushl %ebp
15 ; NOSSE-NEXT: movl %esp, %ebp
17 ; NOSSE-NEXT: movl 8(%ebp), %eax
18 ; NOSSE-NEXT: movl $0, -4(%ebp)
19 ; NOSSE-NEXT: movl $0, -8(%ebp)
20 ; NOSSE-NEXT: movl $0, -12(%ebp)
21 ; NOSSE-NEXT: movl $0, -16(%ebp)
22 ; NOSSE-NEXT: movl $0, -20(%ebp)
23 ; NOSSE-NEXT: movl $0, -24(%ebp)
24 ; NOSSE-NEXT: movl $0, -28(%ebp)
[all …]
H A Dwin32-eh.ll27 ; CHECK: pushl %ebp
28 ; CHECK-NEXT: movl %esp, %ebp
33 ; CHECK-NEXT: movl %esp, -36(%ebp)
34 ; CHECK-NEXT: movl $-1, -16(%ebp)
35 ; CHECK-NEXT: movl $L__ehtable$use_except_handler3, -20(%ebp)
36 ; CHECK-NEXT: leal -28(%ebp), %[[node:[^ ,]*]]
37 ; CHECK-NEXT: movl $__except_handler3, -24(%ebp)
39 ; CHECK-NEXT: movl %[[next]], -28(%ebp)
41 ; CHECK-NEXT: movl $0, -16(%ebp)
44 ; CHECK: movl -28(%ebp), %[[next:[^ ,]*]]
[all …]
H A Dvec-strict-cmp-128.ll14 ; SSE-32-NEXT: pushl %ebp
15 ; SSE-32-NEXT: movl %esp, %ebp
18 ; SSE-32-NEXT: cmpeqps 8(%ebp), %xmm2
22 ; SSE-32-NEXT: movl %ebp, %esp
23 ; SSE-32-NEXT: popl %ebp
36 ; AVX-32-NEXT: pushl %ebp
37 ; AVX-32-NEXT: movl %esp, %ebp
40 ; AVX-32-NEXT: vcmpeqps 8(%ebp), %xmm2, %xmm2
42 ; AVX-32-NEXT: movl %ebp, %esp
43 ; AVX-32-NEXT: popl %ebp
[all...]
H A Dmmx-intrinsics.ll12 ; X86-NEXT: pushl %ebp
13 ; X86-NEXT: movl %esp, %ebp
16 ; X86-NEXT: movl 8(%ebp), %eax
17 ; X86-NEXT: movl 12(%ebp), %ecx
20 ; X86-NEXT: movl 16(%ebp), %eax
21 ; X86-NEXT: movl 20(%ebp), %ecx
29 ; X86-NEXT: movl %ebp, %esp
30 ; X86-NEXT: popl %ebp
57 ; X86-NEXT: pushl %ebp
58 ; X86-NEXT: movl %esp, %ebp
[all...]
H A Dvec-strict-cmp-512.ll8 ; X86-NEXT: pushl %ebp
9 ; X86-NEXT: movl %esp, %ebp
12 ; X86-NEXT: vcmpeqps 8(%ebp), %zmm2, %k1
14 ; X86-NEXT: movl %ebp, %esp
15 ; X86-NEXT: popl %ebp
33 ; X86-NEXT: pushl %ebp
34 ; X86-NEXT: movl %esp, %ebp
37 ; X86-NEXT: vcmpgt_oqps 8(%ebp), %zmm2, %k1
39 ; X86-NEXT: movl %ebp, %esp
40 ; X86-NEXT: popl %ebp
[all …]
H A Dllrint-conv.ll13 ; X86-NOSSE-NEXT: pushl %ebp
15 ; X86-NOSSE-NEXT: .cfi_offset %ebp, -8
16 ; X86-NOSSE-NEXT: movl %esp, %ebp
17 ; X86-NOSSE-NEXT: .cfi_def_cfa_register %ebp
20 ; X86-NOSSE-NEXT: flds 8(%ebp)
24 ; X86-NOSSE-NEXT: movl %ebp, %esp
25 ; X86-NOSSE-NEXT: popl %ebp
31 ; X86-SSE2-NEXT: pushl %ebp
33 ; X86-SSE2-NEXT: .cfi_offset %ebp, -8
34 ; X86-SSE2-NEXT: movl %esp, %ebp
[all …]
H A D3dnow-intrinsics.ll
H A Dvec-strict-cmp-256-fp16.ll8 ; AVX512-32-NEXT: pushl %ebp
9 ; AVX512-32-NEXT: movl %esp, %ebp
12 ; AVX512-32-NEXT: vcmpeqph 8(%ebp), %ymm2, %k1
14 ; AVX512-32-NEXT: movl %ebp, %esp
15 ; AVX512-32-NEXT: popl %ebp
33 ; AVX512-32-NEXT: pushl %ebp
34 ; AVX512-32-NEXT: movl %esp, %ebp
37 ; AVX512-32-NEXT: vcmpgt_oqph 8(%ebp), %ymm2, %k1
39 ; AVX512-32-NEXT: movl %ebp, %esp
40 ; AVX512-32-NEXT: popl %ebp
[all …]
H A Dvec-strict-cmp-512-fp16.ll8 ; X86-NEXT: pushl %ebp
9 ; X86-NEXT: movl %esp, %ebp
12 ; X86-NEXT: vcmpeqph 8(%ebp), %zmm2, %k1
14 ; X86-NEXT: movl %ebp, %esp
15 ; X86-NEXT: popl %ebp
33 ; X86-NEXT: pushl %ebp
34 ; X86-NEXT: movl %esp, %ebp
37 ; X86-NEXT: vcmpgt_oqph 8(%ebp), %zmm2, %k1
39 ; X86-NEXT: movl %ebp, %esp
40 ; X86-NEXT: popl %ebp
[all …]
H A Dvec-strict-cmp-128-fp16.ll8 ; X86-NEXT: pushl %ebp
9 ; X86-NEXT: movl %esp, %ebp
12 ; X86-NEXT: vcmpeqph 8(%ebp), %xmm2, %k1
14 ; X86-NEXT: movl %ebp, %esp
15 ; X86-NEXT: popl %ebp
33 ; X86-NEXT: pushl %ebp
34 ; X86-NEXT: movl %esp, %ebp
37 ; X86-NEXT: vcmpgt_oqph 8(%ebp), %xmm2, %k1
39 ; X86-NEXT: movl %ebp, %esp
40 ; X86-NEXT: popl %ebp
[all …]
H A Dmmx-fold-load.ll8 ; X86-NEXT: pushl %ebp
9 ; X86-NEXT: movl %esp, %ebp
12 ; X86-NEXT: movl 12(%ebp), %eax
13 ; X86-NEXT: movl 8(%ebp), %ecx
20 ; X86-NEXT: movl %ebp, %esp
21 ; X86-NEXT: popl %ebp
43 ; X86-NEXT: pushl %ebp
44 ; X86-NEXT: movl %esp, %ebp
47 ; X86-NEXT: movl 12(%ebp), %eax
48 ; X86-NEXT: movl 8(%ebp),
[all...]
H A Dfp-strict-scalar-inttofp.ll488 ; SSE-X86-NEXT: pushl %ebp
490 ; SSE-X86-NEXT: .cfi_offset %ebp, -8
491 ; SSE-X86-NEXT: movl %esp, %ebp
492 ; SSE-X86-NEXT: .cfi_def_cfa_register %ebp
495 ; SSE-X86-NEXT: movl 8(%ebp), %eax
502 ; SSE-X86-NEXT: movl %ebp, %esp
503 ; SSE-X86-NEXT: popl %ebp
515 ; AVX1-X86-NEXT: pushl %ebp
517 ; AVX1-X86-NEXT: .cfi_offset %ebp, -8
518 ; AVX1-X86-NEXT: movl %esp, %ebp
[all …]
H A Dms-inline-asm-variables-x86-1-reg.ll32 ; X86-NEXT: pushl %ebp
34 ; X86-NEXT: .cfi_offset %ebp, -8
35 ; X86-NEXT: movl %esp, %ebp
36 ; X86-NEXT: .cfi_def_cfa_register %ebp
49 ; X86-NEXT: popl %ebp
55 ; X86PIC-NEXT: pushl %ebp
57 ; X86PIC-NEXT: .cfi_offset %ebp, -8
58 ; X86PIC-NEXT: movl %esp, %ebp
59 ; X86PIC-NEXT: .cfi_def_cfa_register %ebp
79 ; X86PIC-NEXT: popl %ebp
[all …]
H A Dfast-isel-int-float-conversion.ll23 ; SSE2_X86-NEXT: pushl %ebp
25 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8
26 ; SSE2_X86-NEXT: movl %esp, %ebp
27 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp
30 ; SSE2_X86-NEXT: cvtsi2sdl 8(%ebp), %xmm0
33 ; SSE2_X86-NEXT: movl %ebp, %esp
34 ; SSE2_X86-NEXT: popl %ebp
40 ; AVX_X86-NEXT: pushl %ebp
42 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
43 ; AVX_X86-NEXT: movl %esp, %ebp
[all …]
H A Datomic-load-store-wide.ll19 ; NOSSE-NEXT: pushl %ebp
21 ; NOSSE-NEXT: .cfi_offset %ebp, -8
22 ; NOSSE-NEXT: movl %esp, %ebp
23 ; NOSSE-NEXT: .cfi_def_cfa_register %ebp
26 ; NOSSE-NEXT: movl 8(%ebp), %eax
27 ; NOSSE-NEXT: movl 12(%ebp), %ecx
28 ; NOSSE-NEXT: movl 16(%ebp), %edx
34 ; NOSSE-NEXT: movl %ebp, %esp
35 ; NOSSE-NEXT: popl %ebp
53 ; NOSSE-NEXT: pushl %ebp
[all …]
H A Dtail-merge-after-mbp.mir25 ; CHECK: $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
43 ; CHECK: $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
54 $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
67 $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
86 $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
105 $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
111 $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
H A Dwide-fma-contraction.ll10 ; CHECK-NEXT: pushl %ebp
12 ; CHECK-NEXT: .cfi_offset %ebp, -8
13 ; CHECK-NEXT: movl %esp, %ebp
14 ; CHECK-NEXT: .cfi_def_cfa_register %ebp
19 ; CHECK-NEXT: movl %ebp, %esp
20 ; CHECK-NEXT: popl %ebp
25 ; CHECK-NOFMA-NEXT: pushl %ebp
27 ; CHECK-NOFMA-NEXT: .cfi_offset %ebp, -8
28 ; CHECK-NOFMA-NEXT: movl %esp, %ebp
29 ; CHECK-NOFMA-NEXT: .cfi_def_cfa_register %ebp
[all …]
H A Dfast-isel-uint-float-conversion.ll14 ; AVX_X86-NEXT: pushl %ebp
16 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
17 ; AVX_X86-NEXT: movl %esp, %ebp
18 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp
21 ; AVX_X86-NEXT: vcvtusi2sdl 8(%ebp), %xmm0, %xmm0
24 ; AVX_X86-NEXT: movl %ebp, %esp
25 ; AVX_X86-NEXT: popl %ebp
41 ; AVX_X86-NEXT: pushl %ebp
43 ; AVX_X86-NEXT: .cfi_offset %ebp, -8
44 ; AVX_X86-NEXT: movl %esp, %ebp
[all …]
H A D2008-08-31-EH_RETURN32.ll12 ; CHECK-NEXT: pushl %ebp
13 ; CHECK-NEXT: movl %esp, %ebp
20 ; CHECK-NEXT: movl 12(%ebp), %ecx
21 ; CHECK-NEXT: movl 8(%ebp), %eax
22 ; CHECK-NEXT: movl %ecx, 4(%ebp,%eax)
23 ; CHECK-NEXT: leal 4(%ebp,%eax), %ecx
30 ; CHECK-NEXT: popl %ebp
43 ; CHECK-NEXT: pushl %ebp
44 ; CHECK-NEXT: movl %esp, %ebp
46 ; CHECK-NEXT: movl 12(%ebp), %ecx
[all …]
/llvm-project/llvm/test/tools/llvm-objcopy/MachO/Inputs/
H A Dmacho.32.s8 pushl %ebp
10 .cfi_offset %ebp, -8
11 movl %esp, %ebp
12 .cfi_def_cfa_register %ebp
17 movl 8(%ebp), %ecx
19 addl 8(%ebp), %eax
20 movl %ecx, -4(%ebp) ## 4-byte Spill
22 popl %ebp
31 pushl %ebp
33 .cfi_offset %ebp, -8
[all …]
/llvm-project/llvm/test/DebugInfo/MIR/InstrRef/
H A Dx86-lea-fixup-2.mir13 - { reg: '$ebp' }
18 liveins: $eax, $ebp
21 $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg, debug-instr-number 1
34 - { reg: '$ebp' }
39 liveins: $eax, $ebp, $ebx
41 ; CHECK: $ebx = LEA32r $noreg, 2, $ebp, 0, $noreg, debug-instr-number 2
42 $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg, debug-instr-number 1
54 - { reg: '$ebp' }
59 liveins: $eax, $ebp, $ebx
61 ; CHECK: $ebx = LEA32r $noreg, 2, $ebp, 5, $noreg, debug-instr-number 2
[all …]

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