| /llvm-project/llvm/test/MC/M68k/Control/Classes/ |
| H A D | MxBcc.s | 9 ; CHECK: bcc $1
11 bcc $1 label
52 ; CHECK: bcc $3fc
54 bcc $3fc label
|
| /llvm-project/llvm/test/CodeGen/AArch64/ |
| H A D | macro-fusion-last.mir | 1 # RUN: llc -o - %s -mtriple=aarch64-- -mattr=+arith-bcc-fusion -run-pass postmisched | FileCheck %s…
2 # RUN: llc -o - %s -mtriple=aarch64-- -mattr=-arith-bcc-fusion -run-pass postmisched | FileCheck %s…
|
| H A D | misched-fusion.ll | 1 …-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a57 -mattr=+arith-bcc-fusion | FileCheck …
9 ; Make sure cmp is scheduled in front of bcc
|
| H A D | branch-relax-alignment.ll | 2 ; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=4 -align-all-nofallthru-blocks=4 …
|
| H A D | misched-fusion-cmp-bcc.ll | 1 ; RUN: llc %s -o - -O0 -mtriple=aarch64-unknown -mattr=cmp-bcc-fusion | FileCheck %s
|
| H A D | branch-relax-bcc.ll | 2 ; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s
|
| H A D | branch-relax-b.ll | 1 …fset-bits=9 -aarch64-tbz-offset-bits=6 -aarch64-cbz-offset-bits=6 -aarch64-bcc-offset-bits=6 | Fil…
|
| /llvm-project/compiler-rt/lib/builtins/arm/ |
| H A D | udivmodsi4.S | 37 bcc LOCAL_LABEL(divby0)
40 bcc LOCAL_LABEL(quotient0)
|
| H A D | aeabi_uidivmod.S | 29 bcc LOCAL_LABEL(case_denom_larger)
|
| H A D | umodsi3.S | 33 bcc LOCAL_LABEL(divby0)
|
| H A D | udivsi3.S | 45 bcc LOCAL_LABEL(divby0)
|
| H A D | addsf3.S | 162 bcc LOCAL_LABEL(done_round)
|
| /llvm-project/llvm/test/MC/AArch64/ |
| H A D | arm64-condbr-without-dots.s | 8 bcc lbl
|
| H A D | basic-a64-instructions.s | 1242 bcc lbl
|
| /llvm-project/llvm/test/MC/Sparc/ |
| H A D | sparc64-ctrl-instructions.s | 36 ! CHECK: bcc %xcc, .BB0 ! encoding: [0x1a,0b01101AAA,A,A]
38 bcc %xcc, .BB0
268 ! CHECK: bcc,a %icc, .BB0 ! encoding: [0x3a,0b01001AAA,A,A]
270 bcc,a %icc, .BB0
324 ! CHECK: bcc,pn %icc, .BB0 ! encoding: [0x1a,0b01000AAA,A,A]
326 bcc,pn %icc, .BB0
380 ! CHECK: bcc,a,pn %icc, .BB0 ! encoding: [0x3a,0b01000AAA,A,A]
382 bcc,a,pn %icc, .BB0
436 ! CHECK: bcc %icc, .BB0 ! encoding: [0x1a,0b01001AAA,A,A]
438 bcc,pt %icc, .BB0
[all …]
|
| H A D | sparc-ctrl-instructions.s | 131 ! CHECK: bcc .BB0 ! encoding: [0x1a,0b10AAAAAA,A,A]
133 bcc .BB0
135 ! CHECK: bcc .BB0 ! encoding: [0x1a,0b10AAAAAA,A,A]
343 ! CHECK: bcc,a .BB0 ! encoding: [0x3a,0b10AAAAAA,A,A]
345 bcc,a .BB0
|
| /llvm-project/llvm/test/MC/ARM/ |
| H A D | coff-relocations.s | 32 bcc target
|
| /llvm-project/llvm/test/CodeGen/M68k/Arith/ |
| H A D | sub-with-overflow.ll | 54 ; CHECK-NEXT: bcc .LBB1_1
|
| /llvm-project/llvm/test/MC/Disassembler/Sparc/ |
| H A D | sparc.txt | 111 # CHECK: bcc 4194303
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Features.td | 688 "arith-bcc-fusion", "HasArithmeticBccFusion", "true",
689 "CPU fuses arithmetic+bcc operations">;
696 "cmp-bcc-fusion", "HasCmpBccFusion", "true",
697 "CPU fuses cmp+bcc operations">;
|
| /llvm-project/llvm/test/MC/Lanai/ |
| H A D | v11.s | 59 bcc 0x123454 label
99 bcc.r 0x5678
|
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | README-Thumb.txt | 187 is between a cmp and a bcc instruction. However, we can use the (potentially)
|
| /llvm-project/flang/lib/Lower/ |
| H A D | Bridge.cpp | 1435 mlir::Value bcc = builder->createConvert(loc, builder->getI1Type(), cond); in collectFinalEvaluations()
1436 builder->create<mlir::cf::CondBranchOp>(loc, bcc, trueTarget, std::nullopt, in collectFinalEvaluations()
1353 mlir::Value bcc = builder->createConvert(loc, builder->getI1Type(), cond); genConditionalBranch() local
|