/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstrItineraries.h | 186 bool hasPipelineForwarding(unsigned DefClass, unsigned DefIdx, in hasPipelineForwarding() argument 188 unsigned FirstDefIdx = Itineraries[DefClass].FirstOperandCycle; in hasPipelineForwarding() 189 unsigned LastDefIdx = Itineraries[DefClass].LastOperandCycle; in hasPipelineForwarding() 208 std::optional<unsigned> getOperandLatency(unsigned DefClass, unsigned DefIdx, in getOperandLatency() argument 214 std::optional<unsigned> DefCycle = getOperandCycle(DefClass, DefIdx); in getOperandLatency() 224 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
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/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 189 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency() 190 OperLatency = InstrItins.getOperandCycle(DefClass, DefOperIdx); in computeOperandLatency() local
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H A D | TargetInstrInfo.cpp | 1453 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass(); in getOperandLatency() 1455 return ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency() 1457 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); 1524 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency() 1526 ItinData->getOperandCycle(DefClass, DefIdx); in hasLowDefLatency() 1648 unsigned DefClass = DefMI.getDesc().getSchedClass(); in getOperandLatency() 1650 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); 1451 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass(); getOperandLatency() local 1522 unsigned DefClass = DefMI.getDesc().getSchedClass(); hasLowDefLatency() local 1646 unsigned DefClass = DefMI.getDesc().getSchedClass(); getOperandLatency() local
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 437 unsigned DefClass, unsigned DefIdx, 441 unsigned DefClass, unsigned DefIdx,
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H A D | ARMBaseInstrInfo.cpp | 3894 const MCInstrDesc &DefMCID, unsigned DefClass, in getVLDMDefCycle() 3899 return ItinData->getOperandCycle(DefClass, DefIdx); in getVLDMDefCycle() 3934 const MCInstrDesc &DefMCID, unsigned DefClass, in getLDMDefCycle() 3939 return ItinData->getOperandCycle(DefClass, DefIdx); in getLDMDefCycle() 4037 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency() 4041 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency() 4050 DefCycle = ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency() 4059 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency() 4080 DefCycle = getLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency() 4134 if (ItinData->hasPipelineForwarding(DefClass, DefMCI in getBundledDefMI() 3878 getVLDMDefCycle(const InstrItineraryData * ItinData,const MCInstrDesc & DefMCID,unsigned DefClass,unsigned DefIdx,unsigned DefAlign) const getVLDMDefCycle() argument 3918 getLDMDefCycle(const InstrItineraryData * ItinData,const MCInstrDesc & DefMCID,unsigned DefClass,unsigned DefIdx,unsigned DefAlign) const getLDMDefCycle() argument 4021 unsigned DefClass = DefMCID.getSchedClass(); getOperandLatency() local 4834 unsigned DefClass = DefMI.getDesc().getSchedClass(); hasLowDefLatency() local [all...] |
/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 150 unsigned DefClass = MI.getDesc().getSchedClass(); in getInstrLatency() 156 std::optional<unsigned> Cycle = ItinData->getOperandCycle(DefClass, i); in getInstrLatency() 152 unsigned DefClass = MI.getDesc().getSchedClass(); getInstrLatency() local
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