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Searched refs:Def (Results 1 – 25 of 297) sorted by relevance

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/llvm-project/llvm/include/llvm/TableGen/
H A DDirectiveEmitter.h33 Def = DirectiveLanguages[0];
36 StringRef getName() const { return Def->getValueAsString("name"); } in getClausePrefix()
39 return Def->getValueAsString("cppNamespace"); in getClauseEnumSetClass()
43 return Def->getValueAsString("directivePrefix"); in getFlangClauseBaseClass()
47 return Def->getValueAsString("clausePrefix"); in hasMakeEnumAvailableInNamespace()
51 return Def->getValueAsString("clauseEnumSetClass"); in hasEnableBitmaskEnumInNamespace()
55 return Def->getValueAsString("flangClauseBaseClass"); in getAssociations()
59 return Def->getValueAsBit("makeEnumAvailableInNamespace"); in getCategories()
63 return Def->getValueAsBit("enableBitmaskEnumInNamespace"); in getDirectives()
85 const Record *Def; in BaseRecord() argument
115 Directive(const llvm::Record * Def) Directive() argument
146 Clause(const llvm::Record * Def) Clause() argument
214 VersionedClause(const llvm::Record * Def) VersionedClause() argument
229 ClauseVal(const llvm::Record * Def) ClauseVal() argument
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/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLowerBrUnless.cpp76 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
77 switch (Def->getOpcode()) { in runOnMachineFunction()
80 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
84 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
88 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
92 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
96 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
100 Def->setDesc(TII.get(GT_S_I32)); in runOnMachineFunction()
104 Def->setDesc(TII.get(LE_U_I32)); in runOnMachineFunction()
108 Def->setDesc(TII.get(LT_U_I32)); in runOnMachineFunction()
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H A DWebAssemblyDebugValueManager.cpp24 WebAssemblyDebugValueManager::WebAssemblyDebugValueManager(MachineInstr *Def) in WebAssemblyDebugValueManager() argument
25 : Def(Def) { in WebAssemblyDebugValueManager()
26 if (!Def->getMF()->getFunction().getSubprogram()) in WebAssemblyDebugValueManager()
32 if (!Def->getOperand(0).isReg()) in WebAssemblyDebugValueManager()
34 CurrentReg = Def->getOperand(0).getReg(); in WebAssemblyDebugValueManager()
36 for (MachineBasicBlock::iterator MI = std::next(Def->getIterator()), in WebAssemblyDebugValueManager()
37 ME = Def->getParent()->end(); in WebAssemblyDebugValueManager()
70 if (Def->getParent() == Insert->getParent()) { in getSinkableDebugValues()
74 for (MachineBasicBlock::iterator MI = std::next(Def->getIterator()), in getSinkableDebugValues()
75 ME = Def->getParent()->end(); in getSinkableDebugValues()
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H A DWebAssemblyRegStackify.cpp254 // Test whether Def is safe and profitable to rematerialize. in query()
255 static bool shouldRematerialize(const MachineInstr &Def,
257 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def); in shouldRematerialize() argument
267 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef()
268 return Def; in getVRegDef()
270 // MRI doesn't know what the Def is. Try asking LIS. in getVRegDef()
278 // Test whether Reg, as defined at Def, has exactly one use. This is a in getVRegDef()
281 static bool hasOneNonDBGUse(unsigned Reg, MachineInstr *Def,
291 LI.getVNInfoAt(LIS.getInstructionIndex(*Def) in hasOneNonDBGUse()
269 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) getVRegDef() local
283 hasOneNonDBGUse(unsigned Reg,MachineInstr * Def,MachineRegisterInfo & MRI,MachineDominatorTree & MDT,LiveIntervals & LIS) hasOneNonDBGUse() argument
313 isSafeToMove(const MachineOperand * Def,const MachineOperand * Use,const MachineInstr * Insert,const WebAssemblyFunctionInfo & MFI,const MachineRegisterInfo & MRI) isSafeToMove() argument
524 moveForSingleUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI) moveForSingleUse() argument
573 rematerializeCheapDef(unsigned Reg,MachineOperand & Op,MachineInstr & Def,MachineBasicBlock & MBB,MachineBasicBlock::instr_iterator Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII,const WebAssemblyRegisterInfo * TRI) rematerializeCheapDef() argument
636 moveAndTeeForMultiUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII) moveAndTeeForMultiUse() argument
870 MachineOperand *Def = runOnMachineFunction() local
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/llvm-project/libc/utils/LibcTableGenUtil/
H A DAPIIndexer.cpp
H A DAPIIndexer.h
/llvm-project/llvm/utils/TableGen/
H A DExegesisEmitter.cpp48 void emitPfmCountersInfo(const Record &Def,
70 for (const Record *Def : in collectPfmCounters()
75 Def->getValueAsListOfDefs("IssueCounters")) { in collectPfmCounters()
87 Def->getValueAsListOfDefs("ValidationCounters")) in collectPfmCounters()
90 AddPfmCounterName(Def->getValueAsDef("CycleCounter")); in collectPfmCounters()
91 AddPfmCounterName(Def->getValueAsDef("UopsCounter")); in collectPfmCounters()
120 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def, in emitPfmCountersInfo()
124 Def.getValueAsDef("CycleCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
126 Def.getValueAsDef("UopsCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
128 Def in emitPfmCountersInfo()
119 emitPfmCountersInfo(const Record & Def,unsigned & IssueCountersTableOffset,raw_ostream & OS) const emitPfmCountersInfo() argument
202 __anon820df4c50302(const Record *Def) emitPfmCounters() argument
208 for (const Record *Def : PfmCounterDefs) { emitPfmCounters() local
219 for (const Record *Def : PfmCounterDefs) emitPfmCounters() local
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/llvm-project/llvm/utils/TableGen/Common/GlobalISel/
H A DPatternParser.cpp26 const Record &Def; member in llvm::gi::__anon19a25f5e0111::PrettyStackTraceParse
29 PrettyStackTraceParse(const Record &Def) : Def(Def) {} in PrettyStackTraceParse() argument
32 if (Def.isSubClassOf("GICombineRule")) in print()
33 OS << "Parsing GICombineRule '" << Def.getName() << '\''; in print()
34 else if (Def.isSubClassOf(PatFrag::ClassName)) in print()
35 OS << "Parsing " << PatFrag::ClassName << " '" << Def.getName() << '\''; in print()
37 OS << "Parsing '" << Def.getName() << '\''; in print()
128 const Record *Def in parseInstructionPattern()
140 const Record *Def = PFP->getOperatorAsDef(DiagLoc); parseInstructionPattern() local
250 const Record *Def = DefI->getDef(); parseInstructionPatternOperand() local
298 if (const auto *Def = dyn_cast<DefInit>(Arg)) { parseInstructionPatternMIFlags() local
339 parsePatFragImpl(const Record * Def) parsePatFragImpl() argument
436 parsePatFrag(const Record * Def) parsePatFrag() argument
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H A DPatterns.cpp31 PT.Data.Def = R; in get()
93 return Data.Def; in str()
109 return Data.Def == Other.Data.Def; in getKindName()
124 return Data.Def->getName().str(); in printImpl()
309 // nullptr as the Def. in print()
314 auto &Def = Table[OpName]; in dump()
319 if (Def) { in addSetFlag()
324 Def = P; in addUnsetFlag()
345 const auto *Def in hasVariadicDefs()
276 auto &Def = Table[OpName]; addPattern() local
307 const auto *Def = Table.at(Key); print() local
474 PatFrag(const Record & Def) PatFrag() argument
822 getBuiltinInfo(const Record & Def) getBuiltinInfo() argument
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/llvm-project/clang-tools-extra/clang-tidy/readability/
H A DConstReturnTypeCheck.cpp26 findConstToRemove(const FunctionDecl *Def, in findConstToRemove() argument
28 if (!Def->getReturnType().isLocalConstQualified()) in findConstToRemove()
35 SourceLocation NameBeginLoc = Def->getQualifier() in findConstToRemove()
36 ? Def->getQualifierLoc().getBeginLoc() in findConstToRemove()
37 : Def->getLocation(); in findConstToRemove()
42 CharSourceRange::getCharRange(Def->getBeginLoc(), NameBeginLoc), in findConstToRemove()
72 static CheckResult checkDef(const clang::FunctionDecl *Def, in checkDef() argument
75 std::optional<Token> Tok = findConstToRemove(Def, MatchResult); in checkDef()
86 for (const FunctionDecl *Decl = Def->getPreviousDecl(); Decl != nullptr; in checkDef()
115 const auto *Def = Result.Nodes.getNodeAs<FunctionDecl>("func"); in check() local
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H A DStaticDefinitionInAnonymousNamespaceCheck.cpp30 const auto *Def = Result.Nodes.getNodeAs<NamedDecl>("static-def"); in check() local
32 if (Def->getLocation().isMacroID()) in check()
36 const DeclContext *DC = Def->getDeclContext(); in check()
41 diag(Def->getLocation(), "%0 is a static definition in " in check()
43 << Def; in check()
45 SourceLocation Loc = Def->getSourceRange().getBegin(); in check()
46 while (Loc < Def->getSourceRange().getEnd() && in check()
/llvm-project/llvm/lib/CodeGen/
H A DPeepholeOptimizer.cpp458 /// Track Def -> Use info used for rewriting copies.
532 MachineInstr &rewriteSource(MachineInstr &CopyLike, RegSubRegPair Def, in INITIALIZE_PASS_DEPENDENCY()
706 const MachineInstr *Def = nullptr;
708 /// The index of the definition in Def. in optimizeCondBranch()
761 Def = MRI.getVRegDef(Reg); in findNextSource()
1006 /// retrieve all Def -> Use along the way up to the next source. Any found in RewriteCurrentSource()
1046 // Insert the Def -> Use entry for the recently found source. in getNextRewritableSource()
1138 /// Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find in RewriteCurrentSource()
1140 /// multiple sources for a given \p Def ar in RewriteCurrentSource()
413 const MachineInstr *Def = nullptr; global() member in __anon05f69b9c0111::ValueTracker
1175 getNewSource(MachineRegisterInfo * MRI,const TargetInstrInfo * TII,RegSubRegPair Def,const PeepholeOptimizer::RewriteMapTy & RewriteMap,bool HandleMultipleSources=true) getNewSource() argument
1286 rewriteSource(MachineInstr & CopyLike,RegSubRegPair Def,RewriteMapTy & RewriteMap) rewriteSource() argument
1340 RegSubRegPair Def; optimizeUncoalescableCopy() local
1357 for (const RegSubRegPair &Def : RewritePairs) { optimizeUncoalescableCopy() local
1732 const auto &Def = NAPhysToVirtMIs.find(Reg); runOnMachineFunction() local
1744 Register Def = RegMI.first; runOnMachineFunction() local
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H A DReachingDefAnalysis.cpp1 //===---- ReachingDefAnalysis.cpp - Reaching Def Analysis ---*- C++ -*-----===//
127 // While processing the basic block, we kept `Def` relative to the start in processDefs()
200 int Def = Incoming[Unit]; in processBasicBlock()
201 if (Def == ReachingDefDefaultVal) in processBasicBlock()
206 if (Defs.front() >= Def) in processBasicBlock()
210 MBBReachingDefs.replaceFront(MBBNumber, Unit, Def); in processBasicBlock()
213 MBBReachingDefs.prepend(MBBNumber, Unit, Def); in runOnMachineFunction()
218 if (MBBOutRegsInfos[MBBNumber][Unit] < Def - NumInsts) in runOnMachineFunction()
219 MBBOutRegsInfos[MBBNumber][Unit] = Def - NumInsts; in runOnMachineFunction()
270 for (MachineInstr *Def in getReachingDef()
168 int Def = Incoming[Unit]; reprocessBasicBlock() local
253 for (int Def : RegUnitDefs) { traverse() local
272 for (int Def : MBBReachingDefs[MBBNumber][Unit]) { getReachingDef() local
330 getReachingLocalUses(MachineInstr * Def,MCRegister PhysReg,InstSet & Uses) const getReachingLocalUses() argument
402 if (auto *Def = getUniqueReachingMIDef(MI, PhysReg)) { getGlobalReachingDefs() local
429 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) getLiveOuts() local
498 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) isRegDefinedAfter() local
513 int Def = getReachingDef(MI, PhysReg); isReachingDefLiveOut() local
537 int Def = getReachingDef(&*Last, PhysReg); getLocalLiveOutMIDef() local
651 __anonbbc848fb0102(MachineInstr *Def, MCRegister PhysReg) collectKilledOperands() argument
674 if (MachineInstr *Def = getMIOperand(MI, MO)) collectKilledOperands() local
690 if (auto *Def = getReachingLocalMIDef(MI, PhysReg)) { isSafeToDefRegAt() local
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H A DMachineCopyPropagation.cpp206 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in clobberRegister()
209 markRegsUnavailable(Def, TRI); in clobberRegister()
212 // "DefRegs" to contain Def is no longer effectual. We will also need in clobberRegister()
214 // Def. Failing to do so might cause the target to miss some in clobberRegister()
227 // to erase the record for Def in DefRegs. in trackCopy()
230 if (*itr == Def) { in trackCopy()
234 // entries solely record the Def is defined by Src. If an in trackCopy()
235 // entry also contains the definition record of other Def' in trackCopy()
304 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in findAvailCopy()
306 // Remember Def i in findAvailCopy()
179 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); clobberRegister() local
233 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); trackCopy() local
349 Register Def = CopyOperands->Destination->getReg(); findLastSeenDefInCopy() local
490 isNopCopy(const MachineInstr & PreviousCopy,MCRegister Src,MCRegister Def,const TargetRegisterInfo * TRI,const TargetInstrInfo * TII,bool UseCopyInstr) isNopCopy() argument
509 eraseIfRedundant(MachineInstr & Copy,MCRegister Src,MCRegister Def) eraseIfRedundant() argument
558 Register Def = CopyOperands->Destination->getReg(); isBackwardPropagatableRegClassCopy() local
659 hasOverlappingMultipleDef(const MachineInstr & MI,const MachineOperand & MODef,Register Def) hasOverlappingMultipleDef() argument
790 MCRegister Def = RegDef.asMCReg(); ForwardCopyPropagateBlock() local
976 Register Def = CopyOperands.Destination->getReg(); isBackwardPropagatableCopy() local
1017 Register Def = CopyOperands->Destination->getReg(); propagateDefs() local
1116 Register Def = CopyOperands->Destination->getReg(); BackwardCopyPropagateBlock() local
1219 __anond43b9f7b0502(Register Def, Register Src) EliminateSpillageCopies() argument
1271 Register Def = CopyOperands->Destination->getReg(); EliminateSpillageCopies() local
1346 Register Def = CopyOperands->Destination->getReg(); EliminateSpillageCopies() local
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H A DDetectDeadLanes.cpp168 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
169 Register DefReg = Def.getReg(); in transferUsedLanes()
203 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
204 Register DefReg = Def.getReg(); in transferDefinedLanesStep()
214 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes); in transferDefinedLanesStep()
227 const MachineOperand &Def, unsigned OpNum, LaneBitmask DefinedLanes) const { in transferDefinedLanes() argument
228 const MachineInstr &MI = *Def.getParent(); in transferDefinedLanes()
262 assert(Def.getSubReg() == 0 && in transferDefinedLanes()
264 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg()); in transferDefinedLanes()
274 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
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/llvm-project/llvm/lib/WindowsManifest/
H A DWindowsManifestMerger.cpp125 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
126 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { in search()
127 return Def; in search()
153 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
154 return Def; in searchOrDefine()
155 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
156 return Def; in searchOrDefine()
180 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
181 if (xmlStringsEqual(Def->prefix, Prefix)) { in getNamespaceWithPrefix()
182 return Def; in getNamespaceWithPrefix()
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/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUGlobalISelUtils.cpp28 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset()
29 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { in getBaseWithConstantOffset()
31 const MachineOperand &Op = Def->getOperand(1); in getBaseWithConstantOffset()
41 if (Def->getOpcode() == TargetOpcode::G_ADD) { in getBaseWithConstantOffset()
44 if (CheckNUW && !Def->getFlag(MachineInstr::NoUWrap)) { in getBaseWithConstantOffset()
49 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
50 return std::pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
53 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
54 return std::pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
63 if (Def in getBaseWithConstantOffset()
22 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); getBaseWithConstantOffset() local
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H A DSIFoldOperands.cpp258 MachineInstr *Def = MRI->getVRegDef(SrcReg); in tryFoldImmWithOpSel()
259 if (!Def || Def->getNumOperands() != 4) in tryFoldImmWithOpSel()
262 MachineOperand *Src0 = &Def->getOperand(1); in tryFoldImmWithOpSel()
263 MachineOperand *Src1 = &Def->getOperand(2); in tryFoldImmWithOpSel()
275 unsigned NewOp = convertToVALUOp(Def->getOpcode(), UseVOP3); in tryFoldImmWithOpSel()
277 !Def->getOperand(3).isDead()) // Check if scc is dead in tryFoldImmWithOpSel()
280 MachineBasicBlock *MBB = Def->getParent(); in tryFoldImmWithOpSel()
281 const DebugLoc &DL = Def->getDebugLoc(); in tryFoldImmWithOpSel()
284 BuildMI(*MBB, *Def, D in tryFoldImmWithOpSel()
660 MachineInstr *Def = MRI->getVRegDef(UseReg); getRegSeqInit() local
717 MachineInstr *Def = MRI->getVRegDef(UseReg); tryToFoldACImm() local
922 MachineOperand *Def = Defs[I].first; foldOperand() local
1196 MachineInstr *Def = MRI->getVRegDef(Op.getReg()); getImmOrMaterializedImm() local
1565 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg()); tryFoldClamp() local
1731 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg()); tryFoldOMod() local
1773 for (auto &Def : Defs) { tryFoldRegSequence() local
1813 MachineOperand *Def = Defs[I].first; tryFoldRegSequence() local
1956 if (MachineInstr *Def = MRI->getVRegDef(Reg)) { tryFoldPhiAGPR() local
2019 MachineOperand &Def = MI.getOperand(0); tryFoldLoad() local
2134 MachineInstr *Def = MRI->getVRegDef(Reg); tryOptimizeAGPRPhis() local
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/llvm-project/bolt/include/bolt/Passes/
H A DReachingDefOrUse.h28 template <bool Def = false>
30 : public InstrsDataflowAnalysis<ReachingDefOrUse<Def>, !Def> {
31 friend class DataflowAnalysis<ReachingDefOrUse<Def>, BitVector, !Def>;
37 : InstrsDataflowAnalysis<ReachingDefOrUse<Def>, !Def>(BF, AllocId),
44 if (Def) in isReachedBy()
58 void run() { InstrsDataflowAnalysis<ReachingDefOrUse<Def>, !Def>::run(); } in run()
100 if (Def) in doesXKillsY()
132 if (Def) in computeNext()
145 if (Def) in getAnnotationName()
/llvm-project/clang/lib/Format/
H A DMacroExpander.cpp60 Def.Name = Current->TokenText; in parse()
63 Def.ObjectLike = false; in parse()
70 return Def; in parse()
78 Def.Params.push_back(Current); in parseParams()
79 Def.ArgMap[Def.Params.back()->TokenText] = Def.Params.size() - 1; in parseParams()
102 Def.Body.push_back(Current); in parseTail()
105 Def.Body.push_back(Current); in parseTail()
117 Definition Def; member in clang::format::MacroExpander::DefinitionParser
173 const Definition &Def = OptionalArgs expand() local
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/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlan.cpp87 VPValue::VPValue(const unsigned char SC, Value *UV, VPDef *Def) in VPValue()
88 : SubclassID(SC), UnderlyingVal(UV), Def(Def) {
89 if (Def) in ~VPValue()
90 Def->addDefinedValue(this); in ~VPValue()
95 if (Def)
96 Def->removeDefinedValue(this); in print()
101 if (const VPRecipeBase *R = dyn_cast_or_null<VPRecipeBase>(Def)) in print()
108 const VPRecipeBase *Instr = dyn_cast_or_null<VPRecipeBase>(this->Def); in dump()
125 return cast_or_null<VPRecipeBase>(Def); in getDefiningRecipe()
83 VPValue(const unsigned char SC,Value * UV,VPDef * Def) VPValue() argument
227 get(VPValue * Def,const VPIteration & Instance) get() argument
254 get(VPValue * Def,unsigned Part,bool NeedsScalar) get() argument
400 packScalarIntoVectorValue(VPValue * Def,const VPIteration & Instance) packScalarIntoVectorValue() argument
528 for (auto *Def : R.definedValues()) dropAllReferences() local
1545 onlyFirstLaneUsed(const VPValue * Def) onlyFirstLaneUsed() argument
1550 onlyFirstPartUsed(const VPValue * Def) onlyFirstPartUsed() argument
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/llvm-project/llvm/lib/IR/
H A DDominators.cpp137 const Instruction *Def = dyn_cast<Instruction>(DefV); in dominates() local
138 if (!Def) { in dominates()
145 const BasicBlock *DefBB = Def->getParent(); in dominates()
156 if (Def == User) in dominates()
163 if (isa<InvokeInst>(Def) || isa<CallBrInst>(Def) || isa<PHINode>(User)) in dominates()
164 return dominates(Def, UseBB); in dominates()
169 return Def->comesBefore(User); in dominates()
174 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
176 const BasicBlock *DefBB = Def->getParent(); in dominates()
191 if (const auto *II = dyn_cast<InvokeInst>(Def)) { in dominates()
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H A DConvergenceVerifier.cpp63 auto *Def = dyn_cast<Instruction>(Token); in findAndCheckConvergenceTokenUsed() local
65 CheckOrNull(Def && getConvOp(*Def) != CONV_NONE, in findAndCheckConvergenceTokenUsed()
70 if (Def) in findAndCheckConvergenceTokenUsed()
71 Tokens[&I] = Def; in findAndCheckConvergenceTokenUsed()
73 return Def; in findAndCheckConvergenceTokenUsed()
/llvm-project/clang/utils/TableGen/
H A DSveEmitter.cpp1476 for (auto &Def : Defs) { in createBuiltins()
1479 if (Def->getClassKind() != ClassG) { in createBuiltins()
1480 OS << "TARGET_BUILTIN(__builtin_sve_" << Def->getMangledName() << ", \"" in createBuiltins()
1481 << Def->getBuiltinTypeStr() << "\", \"n\", \""; in createBuiltins()
1482 Def->printGuard(OS); in createBuiltins()
1518 for (auto &Def : Defs) {
1521 if (Def->getClassKind() == ClassG) in createRangeChecks()
1524 uint64_t Flags = Def->getFlags(); in createRangeChecks()
1527 std::string LLVMName = Def->getMangledLLVMName(); in createRangeChecks()
1528 std::string Builtin = Def in createRangeChecks()
1457 for (auto &Def : Defs) { createBuiltins() local
1499 for (auto &Def : Defs) { createCodeGenMap() local
1537 for (auto &Def : Defs) { createRangeChecks() local
1663 for (auto &Def : Defs) { createSMEBuiltins() local
1691 for (auto &Def : Defs) { createSMECodeGenMap() local
1730 for (auto &Def : Defs) { createSMERangeChecks() local
1754 for (auto &Def : Defs) { createBuiltinZAState() local
1812 for (auto &Def : Defs) { createStreamingAttrs() local
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/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
212 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
225 MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1); in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
305 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in transformInstruction()
315 Def->eraseFromParent(); in transformInstruction()
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