| /freebsd-src/contrib/llvm-project/llvm/include/llvm/TableGen/ |
| H A D | DirectiveEmitter.h | 21 Def = DirectiveLanguages[0]; in DirectiveLanguage()
24 StringRef getName() const { return Def->getValueAsString("name"); } in getName()
27 return Def->getValueAsString("cppNamespace"); in getCppNamespace()
31 return Def->getValueAsString("directivePrefix"); in getDirectivePrefix()
35 return Def->getValueAsString("clausePrefix"); in getClausePrefix()
39 return Def->getValueAsString("clauseEnumSetClass"); in getClauseEnumSetClass()
43 return Def->getValueAsString("flangClauseBaseClass"); in getFlangClauseBaseClass()
47 return Def->getValueAsBit("makeEnumAvailableInNamespace"); in hasMakeEnumAvailableInNamespace()
51 return Def->getValueAsBit("enableBitmaskEnumInNamespace"); in hasEnableBitmaskEnumInNamespace()
73 const llvm::Record *Def;
77 BaseRecord(const llvm::Record * Def) BaseRecord() argument
107 Directive(const llvm::Record * Def) Directive() argument
130 Clause(const llvm::Record * Def) Clause() argument
198 VersionedClause(const llvm::Record * Def) VersionedClause() argument
213 ClauseVal(const llvm::Record * Def) ClauseVal() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyLowerBrUnless.cpp | 76 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
77 switch (Def->getOpcode()) { in runOnMachineFunction()
80 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
84 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
88 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
92 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
96 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
100 Def->setDesc(TII.get(GT_S_I32)); in runOnMachineFunction()
104 Def->setDesc(TII.get(LE_U_I32)); in runOnMachineFunction()
108 Def->setDesc(TII.get(LT_U_I32)); in runOnMachineFunction()
[all …]
|
| H A D | WebAssemblyDebugValueManager.cpp | 24 WebAssemblyDebugValueManager::WebAssemblyDebugValueManager(MachineInstr *Def) in WebAssemblyDebugValueManager() argument
25 : Def(Def) { in WebAssemblyDebugValueManager()
26 if (!Def->getMF()->getFunction().getSubprogram()) in WebAssemblyDebugValueManager()
32 if (!Def->getOperand(0).isReg()) in WebAssemblyDebugValueManager()
34 CurrentReg = Def->getOperand(0).getReg(); in WebAssemblyDebugValueManager()
36 for (MachineBasicBlock::iterator MI = std::next(Def->getIterator()), in WebAssemblyDebugValueManager()
37 ME = Def->getParent()->end(); in WebAssemblyDebugValueManager()
67 // DBG_VALUEs between Def and Insert in getSinkableDebugValues()
70 if (Def in getSinkableDebugValues()
[all...] |
| H A D | WebAssemblyRegStackify.cpp | 256 // Test whether Def is safe and profitable to rematerialize. in shouldRematerialize() argument
257 static bool shouldRematerialize(const MachineInstr &Def, in shouldRematerialize()
259 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def); in shouldRematerialize()
269 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef()
270 return Def; in getVRegDef()
272 // MRI doesn't know what the Def is. Try asking LIS. in getVRegDef()
280 // Test whether Reg, as defined at Def, has exactly one use. This is a
283 static bool hasOneNonDBGUse(unsigned Reg, MachineInstr *Def, in hasOneNonDBGUse()
293 LI.getVNInfoAt(LIS.getInstructionIndex(*Def) in hasOneNonDBGUse()
268 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) getVRegDef() local
282 hasOneNonDBGUse(unsigned Reg,MachineInstr * Def,MachineRegisterInfo & MRI,MachineDominatorTree & MDT,LiveIntervals & LIS) hasOneNonDBGUse() argument
312 isSafeToMove(const MachineOperand * Def,const MachineOperand * Use,const MachineInstr * Insert,const WebAssemblyFunctionInfo & MFI,const MachineRegisterInfo & MRI) isSafeToMove() argument
521 moveForSingleUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI) moveForSingleUse() argument
570 rematerializeCheapDef(unsigned Reg,MachineOperand & Op,MachineInstr & Def,MachineBasicBlock & MBB,MachineBasicBlock::instr_iterator Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII,const WebAssemblyRegisterInfo * TRI) rematerializeCheapDef() argument
633 moveAndTeeForMultiUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII) moveAndTeeForMultiUse() argument
867 MachineOperand *Def = DefI->findRegisterDefOperand(Reg); runOnMachineFunction() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | ExegesisEmitter.cpp | 48 void emitPfmCountersInfo(const Record &Def,
70 for (Record *Def : Records.getAllDerivedDefinitions("ProcPfmCounters")) { in collectPfmCounters()
74 Def->getValueAsListOfDefs("IssueCounters")) { in collectPfmCounters()
86 Def->getValueAsListOfDefs("ValidationCounters")) in collectPfmCounters()
89 AddPfmCounterName(Def->getValueAsDef("CycleCounter")); in collectPfmCounters()
90 AddPfmCounterName(Def->getValueAsDef("UopsCounter")); in collectPfmCounters()
119 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def, in emitPfmCountersInfo() argument
123 Def.getValueAsDef("CycleCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
125 Def.getValueAsDef("UopsCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
127 Def.getValueAsListOfDefs("IssueCounters").size(); in emitPfmCountersInfo()
[all …]
|
| H A D | GlobalISelCombinerEmitter.cpp | 146 const Record &Def; in getLLTCodeGenOrTempType()
149 PrettyStackTraceParse(const Record &Def) : Def(Def) {} in getLLTCodeGenOrTempType()
152 if (Def.isSubClassOf("GICombineRule"))
153 OS << "Parsing GICombineRule '" << Def.getName() << "'";
154 else if (Def.isSubClassOf(PatFrag::ClassName))
155 OS << "Parsing " << PatFrag::ClassName << " '" << Def.getName() << "'"; member in __anon0d4329740111::PrettyStackTraceParse
157 OS << "Parsing '" << Def.getName() << "'";
163 const Record &Def; in print()
158 PrettyStackTraceParse(const Record & Def) PrettyStackTraceParse() argument
172 const Record &Def; global() member in __anon0d4329740111::PrettyStackTraceEmit
176 PrettyStackTraceEmit(const Record & Def,const Pattern * Pat=nullptr) PrettyStackTraceEmit() argument
1272 auto *Def = MatchOpTable.getDef(OldRegName); checkSemantics() local
1322 Record *Def = Pred->getDef(); addFeaturePredicates() local
1452 parseDefs(const DagInit & Def) parseDefs() argument
1563 const Record *Def = PFP->getOperatorAsDef(RuleDef.getLoc()); parseInstructionPattern() local
1673 const Record *Def = DefI->getDef(); parseInstructionPatternOperand() local
1721 if (const auto *Def = dyn_cast<DefInit>(Arg)) { parseInstructionPatternMIFlags() local
2103 const auto *Def = FragAltOT.getDef(ParamName); emitPatFragMatchPattern() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 185 /// Track Def -> Use info used for rewriting copies.
258 RegSubRegPair Def, RewriteMapTy &RewriteMap);
413 const MachineInstr *Def = nullptr; member in __anon40c6a21b0111::ValueTracker
415 /// The index of the definition in Def.
469 Def = MRI.getVRegDef(Reg); in ValueTracker()
714 /// retrieve all Def -> Use along the way up to the next source. Any found
754 // Insert the Def -> Use entry for the recently found source. in findNextSource()
1167 /// Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find
1169 /// multiple sources for a given \p Def ar
1176 getNewSource(MachineRegisterInfo * MRI,const TargetInstrInfo * TII,RegSubRegPair Def,const PeepholeOptimizer::RewriteMapTy & RewriteMap,bool HandleMultipleSources=true) getNewSource() argument
1287 rewriteSource(MachineInstr & CopyLike,RegSubRegPair Def,RewriteMapTy & RewriteMap) rewriteSource() argument
1341 RegSubRegPair Def; optimizeUncoalescableCopy() local
1358 for (const RegSubRegPair &Def : RewritePairs) { optimizeUncoalescableCopy() local
1732 const auto &Def = NAPhysToVirtMIs.find(Reg); runOnMachineFunction() local
1744 Register Def = RegMI.first; runOnMachineFunction() local
[all...] |
| H A D | ReachingDefAnalysis.cpp | 1 //===---- ReachingDefAnalysis.cpp - Reaching Def Analysis ---*- C++ -*-----===//
111 // While processing the basic block, we kept `Def` relative to the start in leaveBasicBlock()
168 int Def = Incoming[Unit]; in reprocessBasicBlock() local
169 if (Def == ReachingDefDefaultVal) in reprocessBasicBlock()
174 if (*Start >= Def) in reprocessBasicBlock()
178 *Start = Def; in reprocessBasicBlock()
181 MBBReachingDefs[MBBNumber][Unit].insert(Start, Def); in reprocessBasicBlock()
186 if (MBBOutRegsInfos[MBBNumber][Unit] < Def - NumInsts) in reprocessBasicBlock()
187 MBBOutRegsInfos[MBBNumber][Unit] = Def - NumInsts; in reprocessBasicBlock()
253 for (int Def in traverse() local
272 for (int Def : MBBReachingDefs[MBBNumber][Unit]) { getReachingDef() local
330 getReachingLocalUses(MachineInstr * Def,MCRegister PhysReg,InstSet & Uses) const getReachingLocalUses() argument
402 if (auto *Def = getUniqueReachingMIDef(MI, PhysReg)) { getGlobalReachingDefs() local
429 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) getLiveOuts() local
498 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) isRegDefinedAfter() local
513 int Def = getReachingDef(MI, PhysReg); isReachingDefLiveOut() local
537 int Def = getReachingDef(&*Last, PhysReg); getLocalLiveOutMIDef() local
651 __anoneab3eb3a0102(MachineInstr *Def, MCRegister PhysReg) collectKilledOperands() argument
674 if (MachineInstr *Def = getMIOperand(MI, MO)) collectKilledOperands() local
690 if (auto *Def = getReachingLocalMIDef(MI, PhysReg)) { isSafeToDefRegAt() local
[all...] |
| H A D | MachineCopyPropagation.cpp | 180 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in clobberRegister()
183 markRegsUnavailable(Def, TRI); in clobberRegister()
186 // "DefRegs" to contain Def is no longer effectual. We will also need in clobberRegister()
188 // Def. Failing to do so might cause the target to miss some in clobberRegister()
201 // to erase the record for Def in DefRegs. in clobberRegister()
204 if (*itr == Def) { in clobberRegister()
208 // entries solely record the Def is defined by Src. If an in clobberRegister()
209 // entry also contains the definition record of other Def' in clobberRegister()
234 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in trackCopy()
236 // Remember Def i in trackCopy()
179 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); clobberRegister() local
233 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); trackCopy() local
349 Register Def = CopyOperands->Destination->getReg(); findLastSeenDefInCopy() local
473 isNopCopy(const MachineInstr & PreviousCopy,MCRegister Src,MCRegister Def,const TargetRegisterInfo * TRI,const TargetInstrInfo * TII,bool UseCopyInstr) isNopCopy() argument
492 eraseIfRedundant(MachineInstr & Copy,MCRegister Src,MCRegister Def) eraseIfRedundant() argument
541 Register Def = CopyOperands->Destination->getReg(); isBackwardPropagatableRegClassCopy() local
642 hasOverlappingMultipleDef(const MachineInstr & MI,const MachineOperand & MODef,Register Def) hasOverlappingMultipleDef() argument
773 MCRegister Def = RegDef.asMCReg(); ForwardCopyPropagateBlock() local
953 Register Def = CopyOperands.Destination->getReg(); isBackwardPropagatableCopy() local
994 Register Def = CopyOperands->Destination->getReg(); propagateDefs() local
1093 Register Def = CopyOperands->Destination->getReg(); BackwardCopyPropagateBlock() local
1196 __anon783e8d5a0502(Register Def, Register Src) EliminateSpillageCopies() argument
1248 Register Def = CopyOperands->Destination->getReg(); EliminateSpillageCopies() local
1323 Register Def = CopyOperands->Destination->getReg(); EliminateSpillageCopies() local
[all...] |
| H A D | DetectDeadLanes.cpp | 168 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
169 Register DefReg = Def.getReg(); in transferUsedLanes()
203 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
204 Register DefReg = Def.getReg(); in transferDefinedLanesStep()
214 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes); in transferDefinedLanesStep()
227 const MachineOperand &Def, unsigned OpNum, LaneBitmask DefinedLanes) const { in transferDefinedLanes() argument
228 const MachineInstr &MI = *Def.getParent(); in transferDefinedLanes()
262 assert(Def.getSubReg() == 0 && in transferDefinedLanes()
264 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg()); in transferDefinedLanes()
274 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/WindowsManifest/ |
| H A D | WindowsManifestMerger.cpp | 125 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
126 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { in search()
127 return Def; in search()
153 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
154 return Def; in searchOrDefine()
155 if (xmlNsPtr Def in searchOrDefine() local
180 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { getNamespaceWithPrefix() local
343 for (xmlNsPtr Def = AdditionalNode->nsDef; Def; Def = Def->next) { mergeNamespaces() local
599 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { checkAndStripPrefixes() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUGlobalISelUtils.cpp | 22 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset() local
23 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { in getBaseWithConstantOffset()
25 const MachineOperand &Op = Def->getOperand(1); in getBaseWithConstantOffset()
35 if (Def->getOpcode() == TargetOpcode::G_ADD) { in getBaseWithConstantOffset()
38 if (CheckNUW && !Def->getFlag(MachineInstr::NoUWrap)) { in getBaseWithConstantOffset()
43 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
44 return std::pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
47 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
48 return std::pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
57 if (Def in getBaseWithConstantOffset()
[all...] |
| H A D | SIFoldOperands.cpp | 660 MachineInstr *Def = MRI->getVRegDef(UseReg); in getRegSeqInit()
661 if (!Def || !Def->isRegSequence()) in getRegSeqInit()
664 for (unsigned I = 1, E = Def->getNumExplicitOperands(); I < E; I += 2) { in getRegSeqInit()
665 MachineOperand *Sub = &Def->getOperand(I); in getRegSeqInit()
683 Defs.emplace_back(Sub, Def->getOperand(I + 1).getImm()); in getRegSeqInit()
717 MachineInstr *Def = MRI->getVRegDef(UseReg); in tryToFoldACImm()
719 if (!UseOp.getSubReg() && Def && TII->isFoldableCopy(*Def)) { in tryToFoldACImm()
720 MachineOperand &DefOp = Def in tryToFoldACImm()
658 MachineInstr *Def = MRI->getVRegDef(UseReg); getRegSeqInit() local
715 MachineInstr *Def = MRI->getVRegDef(UseReg); tryToFoldACImm() local
905 MachineOperand *Def = Defs[I].first; foldOperand() local
1178 MachineInstr *Def = MRI->getVRegDef(Op.getReg()); getImmOrMaterializedImm() local
1544 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg()); tryFoldClamp() local
1705 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg()); tryFoldOMod() local
1744 for (auto &Def : Defs) { tryFoldRegSequence() local
1784 MachineOperand *Def = Defs[I].first; tryFoldRegSequence() local
1927 if (MachineInstr *Def = MRI->getVRegDef(Reg)) { tryFoldPhiAGPR() local
1990 MachineOperand &Def = MI.getOperand(0); tryFoldLoad() local
2103 MachineInstr *Def = MRI->getVRegDef(Reg); tryOptimizeAGPRPhis() local
[all...] |
| /freebsd-src/contrib/llvm-project/clang/lib/Format/ |
| H A D | MacroExpander.cpp | 60 Def.Name = Current->TokenText; in parse()
63 Def.ObjectLike = false; in parse()
70 return Def; in parse()
78 Def.Params.push_back(Current); in parseParams()
79 Def.ArgMap[Def.Params.back()->TokenText] = Def.Params.size() - 1; in parseParams()
102 Def.Body.push_back(Current); in parseTail()
105 Def.Body.push_back(Current); in parseTail()
117 Definition Def; member in clang::format::MacroExpander::DefinitionParser
173 const Definition &Def = OptionalArgs expand() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.cpp | 83 VPValue::VPValue(const unsigned char SC, Value *UV, VPDef *Def) in VPValue()
84 : SubclassID(SC), UnderlyingVal(UV), Def(Def) {
85 if (Def) in ~VPValue()
86 Def->addDefinedValue(this); in ~VPValue()
91 if (Def)
92 Def->removeDefinedValue(this); in print()
97 if (const VPRecipeBase *R = dyn_cast_or_null<VPRecipeBase>(Def)) in print()
104 const VPRecipeBase *Instr = dyn_cast_or_null<VPRecipeBase>(this->Def); in dump()
121 return cast_or_null<VPRecipeBase>(Def); in getDefiningRecipe()
79 VPValue(const unsigned char SC,Value * UV,VPDef * Def) VPValue() argument
215 get(VPValue * Def,const VPIteration & Instance) get() argument
237 get(VPValue * Def,unsigned Part) get() argument
383 packScalarIntoVectorValue(VPValue * Def,const VPIteration & Instance) packScalarIntoVectorValue() argument
503 for (auto *Def : R.definedValues()) dropAllReferences() local
1270 onlyFirstLaneUsed(VPValue * Def) onlyFirstLaneUsed() argument
1275 onlyFirstPartUsed(VPValue * Def) onlyFirstPartUsed() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
| H A D | Patterns.cpp | |
| H A D | Patterns.h | |
| /freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Dominators.cpp | 137 const Instruction *Def = dyn_cast<Instruction>(DefV); in dominates() local
138 if (!Def) { in dominates()
145 const BasicBlock *DefBB = Def->getParent(); in dominates()
156 if (Def == User) in dominates()
163 if (isa<InvokeInst>(Def) || isa<CallBrInst>(Def) || isa<PHINode>(User)) in dominates()
164 return dominates(Def, UseBB); in dominates()
169 return Def->comesBefore(User); in dominates()
174 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
176 const BasicBlock *DefBB = Def->getParent(); in dominates()
191 if (const auto *II = dyn_cast<InvokeInst>(Def)) { in dominates()
[all …]
|
| H A D | ConvergenceVerifier.cpp | 63 auto *Def = dyn_cast<Instruction>(Token); in isConvergent()
65 CheckOrNull(Def && getConvOp(*Def) != CONV_NONE, in isConvergent()
70 if (Def)
71 Tokens[&I] = Def;
73 return Def;
39 auto *Def = dyn_cast<Instruction>(Token); findAndCheckConvergenceTokenUsed() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
212 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
225 MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1); in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
305 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in transformInstruction()
315 Def->eraseFromParent(); in transformInstruction()
[all …]
|
| /freebsd-src/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | SveEmitter.cpp | 1457 for (auto &Def : Defs) { in createBuiltins()
1460 if (Def->getClassKind() != ClassG) { in createBuiltins()
1461 OS << "TARGET_BUILTIN(__builtin_sve_" << Def->getMangledName() << ", \"" in createBuiltins()
1462 << Def->getBuiltinTypeStr() << "\", \"n\", \""; in createBuiltins()
1463 Def->printGuard(OS);
1499 for (auto &Def : Defs) { in createRangeChecks()
1502 if (Def->getClassKind() == ClassG) in createRangeChecks()
1505 uint64_t Flags = Def->getFlags(); in createRangeChecks()
1508 std::string LLVMName = Def->getMangledLLVMName(); in createRangeChecks()
1509 std::string Builtin = Def in createRangeChecks()
1437 for (auto &Def : Defs) { createBuiltins() local
1477 for (auto &Def : Defs) { createCodeGenMap() local
1515 for (auto &Def : Defs) { createRangeChecks() local
1635 for (auto &Def : Defs) { createSMEBuiltins() local
1661 for (auto &Def : Defs) { createSMECodeGenMap() local
1700 for (auto &Def : Defs) { createSMERangeChecks() local
1724 for (auto &Def : Defs) { createBuiltinZAState() local
1781 for (auto &Def : Defs) { createStreamingAttrs() local
[all...] |
| H A D | RISCVVEmitter.cpp | 427 for (auto &Def : Defs) { in createBuiltins()
429 BuiltinMap.insert(std::make_pair(Def->getBuiltinName(), Def.get())); in createBuiltins() local
432 if (P.first->second->hasBuiltinAlias() != Def->hasBuiltinAlias()) in createBuiltins()
434 else if (!Def->hasBuiltinAlias() && in createBuiltins()
435 P.first->second->getBuiltinTypeStr() != Def->getBuiltinTypeStr()) in createBuiltins()
439 OS << "RISCVV_BUILTIN(__builtin_rvv_" << Def->getBuiltinName() << ",\""; in createBuiltins()
440 if (!Def->hasBuiltinAlias()) in createBuiltins()
441 OS << Def->getBuiltinTypeStr(); in createBuiltins()
464 for (auto &Def in createCodeGen()
466 for (auto &Def : Defs) { createCodeGen() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/ToolDrivers/llvm-dlltool/ |
| H A D | DlltoolDriver.cpp | 128 Expected<COFFModuleDefinition> Def = parseCOFFModuleDefinition( in dlltoolDriverMain()
130 if (!Def) { in dlltoolDriverMain()
132 << errorToErrorCode(Def.takeError()).message() << "\n"; in dlltoolDriverMain()
137 OutputFile = std::move(Def->OutputFile); in dlltoolDriverMain()
144 for (COFFShortExport &E : Def->Exports) { in dlltoolDriverMain()
151 Exports = std::move(Def->Exports); in dlltoolDriverMain()
169 Expected<COFFModuleDefinition> Def = parseCOFFModuleDefinition( dlltoolDriverMain() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | UnifyLoopExits.cpp | 114 // For each Def used outside the loop, create NewPhi in in INITIALIZE_PASS_DEPENDENCY()
115 // LoopExitBlock. NewPhi receives Def only along exiting blocks that in INITIALIZE_PASS_DEPENDENCY()
118 auto Def = II.first; in INITIALIZE_PASS_DEPENDENCY() local
119 LLVM_DEBUG(dbgs() << "externally used: " << Def->getName() << "\n"); in INITIALIZE_PASS_DEPENDENCY()
121 PHINode::Create(Def->getType(), Incoming.size(), in INITIALIZE_PASS_DEPENDENCY()
122 Def->getName() + ".moved", LoopExitBlock->begin()); in INITIALIZE_PASS_DEPENDENCY()
125 if (Def->getParent() == In || DT.dominates(Def, In)) { in INITIALIZE_PASS_DEPENDENCY()
127 NewPhi->addIncoming(Def, In); in INITIALIZE_PASS_DEPENDENCY()
130 NewPhi->addIncoming(PoisonValue::get(Def in INITIALIZE_PASS_DEPENDENCY()
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Instruction.cpp | 201 if (!all_of(getDefs(), [](const WriteState &Def) { return Def.isReady(); })) in updatePending() argument
218 [](const WriteState &Def) { return !Def.getDependentWrite(); })) in updateDispatched() argument
240 for (WriteState &Def : getDefs()) in cycleEvent()
241 Def.cycleEvent(); in cycleEvent()
249 for (WriteState &Def : getDefs()) in cycleEvent()
250 Def.cycleEvent(); in cycleEvent()
|