Searched refs:num_rings (Results 1 – 17 of 17) sorted by relevance
86 for (i = 0; i < adev->num_rings; i++) { in amdgpu_ctx_init()177 for (i = 0; i < ctx->adev->num_rings; i++) { in amdgpu_ctx_do_release()409 for (i = 0; i < adev->num_rings; i++) { in amdgpu_ctx_priority_override()464 for (i = 0; i < ctx->adev->num_rings; i++) { in amdgpu_ctx_mgr_entity_flush()489 for (i = 0; i < ctx->adev->num_rings; i++) { in amdgpu_ctx_mgr_entity_fini()
411 adev->vce.num_rings = 3; in vce_v3_0_early_init()437 adev->vce.num_rings = 2; in vce_v3_0_sw_init()443 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v3_0_sw_init()477 for (i = 0; i < adev->vce.num_rings; i++) in vce_v3_0_hw_init()480 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v3_0_hw_init()948 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v3_0_set_ring_funcs()954 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v3_0_set_ring_funcs()
408 adev->vce.num_rings = 1; in vce_v4_0_early_init()410 adev->vce.num_rings = 3; in vce_v4_0_early_init()458 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_sw_init()522 for (i = 0; i < adev->vce.num_rings; i++) in vce_v4_0_hw_init()525 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_hw_init()551 for (i = 0; i < adev->vce.num_rings; i++) in vce_v4_0_hw_fini()1099 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_set_ring_funcs()
53 unsigned num_rings; member
256 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()260 ring->idx = adev->num_rings++; in amdgpu_ring_init()
252 ip_num_rings = adev->vce.num_rings; in amdgpu_queue_mgr_map()
219 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_vce_sw_fini()331 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_vce_idle_work_handler()
665 for(i = 0; i < adev->num_rings; ++i) { in gmc_v9_0_late_init()
339 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_info_ioctl()
1482 unsigned num_rings; member
696 for (i = 0; i < adev->num_rings; i++) { in amdgpu_vm_check_compute_bug()
2351 adev->num_rings = 0; in amdgpu_device_init()
605 const int num_rings = in mi_set_context() local608 INTEL_INFO(dev_priv)->num_rings - 1 : in mi_set_context()622 len += 2 + (num_rings ? 4*num_rings + 6 : 0); in mi_set_context()631 if (num_rings) { in mi_set_context()634 *cs++ = MI_LOAD_REGISTER_IMM(num_rings); in mi_set_context()657 if (num_rings) { in mi_set_context()661 *cs++ = MI_LOAD_REGISTER_IMM(num_rings); in mi_set_context()
770 int num_rings = 0; in gen6_signal() local783 num_rings++; in gen6_signal()786 if (num_rings & 1) in gen6_signal()2056 int num_rings; in intel_ring_default_vfuncs() local2060 num_rings = INTEL_INFO(dev_priv)->num_rings - 1; in intel_ring_default_vfuncs()2062 engine->emit_breadcrumb_sz += num_rings * 6; in intel_ring_default_vfuncs()2064 engine->emit_breadcrumb_sz += num_rings * 3; in intel_ring_default_vfuncs()2065 if (num_rings & 1) in intel_ring_default_vfuncs()2100 int num_rings; in intel_init_render_ring_buffer() local2104 num_rings = INTEL_INFO(dev_priv)->num_rings - 1; in intel_init_render_ring_buffer()[all …]
282 device_info->num_rings = hweight32(mask); in intel_engines_init_mmio()
859 u8 num_rings; member
609 unsigned i, num_rings = 0; in radeon_fence_wait_any() local620 ++num_rings; in radeon_fence_wait_any()624 if (num_rings == 0) in radeon_fence_wait_any()