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Searched refs:UvdBootLevel (Results 1 – 17 of 17) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/powerplay/inc/
H A Dsmumgr.h47 UvdBootLevel, enumerator
H A Dsmu7_fusion.h240 uint8_t UvdBootLevel; member
H A Dsmu7_discrete.h337 uint8_t UvdBootLevel; member
H A Dsmu73_discrete.h263 uint8_t UvdBootLevel; member
H A Dsmu72_discrete.h279 uint8_t UvdBootLevel; member
H A Dsmu74_discrete.h297 uint8_t UvdBootLevel; member
H A Dsmu75_discrete.h303 uint8_t UvdBootLevel; member
/dflybsd-src/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c339 smu_data->smc_state_table.UvdBootLevel = 0; in vegam_update_uvd_smc_table()
341 smu_data->smc_state_table.UvdBootLevel = in vegam_update_uvd_smc_table()
344 UvdBootLevel); in vegam_update_uvd_smc_table()
350 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in vegam_update_uvd_smc_table()
360 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in vegam_update_uvd_smc_table()
1332 table->UvdBootLevel = 0; in vegam_populate_smc_uvd_level()
2192 case UvdBootLevel: in vegam_get_offsetof()
2193 return offsetof(SMU75_Discrete_DpmTable, UvdBootLevel); in vegam_get_offsetof()
H A Dfiji_smumgr.c1579 table->UvdBootLevel = 0; in fiji_populate_smc_uvd_level()
2336 case UvdBootLevel: in fiji_get_offsetof()
2337 return offsetof(SMU73_Discrete_DpmTable, UvdBootLevel); in fiji_get_offsetof()
2382 smu_data->smc_state_table.UvdBootLevel = 0; in fiji_update_uvd_smc_table()
2384 smu_data->smc_state_table.UvdBootLevel = in fiji_update_uvd_smc_table()
2387 UvdBootLevel); in fiji_update_uvd_smc_table()
2393 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in fiji_update_uvd_smc_table()
2403 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in fiji_update_uvd_smc_table()
H A Dpolaris10_smumgr.c1404 table->UvdBootLevel = 0; in polaris10_populate_smc_uvd_level()
2129 smu_data->smc_state_table.UvdBootLevel = 0; in polaris10_update_uvd_smc_table()
2131 smu_data->smc_state_table.UvdBootLevel = in polaris10_update_uvd_smc_table()
2134 UvdBootLevel); in polaris10_update_uvd_smc_table()
2140 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in polaris10_update_uvd_smc_table()
2150 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in polaris10_update_uvd_smc_table()
2286 case UvdBootLevel: in polaris10_get_offsetof()
2287 return offsetof(SMU74_Discrete_DpmTable, UvdBootLevel); in polaris10_get_offsetof()
H A Dtonga_smumgr.c1311 table->UvdBootLevel = 0; in tonga_populate_smc_uvd_level()
2625 case UvdBootLevel: in tonga_get_offsetof()
2626 return offsetof(SMU72_Discrete_DpmTable, UvdBootLevel); in tonga_get_offsetof()
2671 smu_data->smc_state_table.UvdBootLevel = 0; in tonga_update_uvd_smc_table()
2673 smu_data->smc_state_table.UvdBootLevel = in tonga_update_uvd_smc_table()
2676 offsetof(SMU72_Discrete_DpmTable, UvdBootLevel); in tonga_update_uvd_smc_table()
2682 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in tonga_update_uvd_smc_table()
2693 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in tonga_update_uvd_smc_table()
H A Dci_smumgr.c2009 table->UvdBootLevel = 0; in ci_init_smc_table()
2868 smu_data->smc_state_table.UvdBootLevel = 0; in ci_update_uvd_smc_table()
2870 smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1; in ci_update_uvd_smc_table()
2873 UvdBootLevel, smu_data->smc_state_table.UvdBootLevel); in ci_update_uvd_smc_table()
/dflybsd-src/sys/dev/drm/radeon/
H A Dsmu7_fusion.h240 uint8_t UvdBootLevel; member
H A Dsmu7_discrete.h336 uint8_t UvdBootLevel; member
H A Dci_dpm.c3656 table->UvdBootLevel = 0; in ci_init_smc_table()
4116 pi->smc_state_table.UvdBootLevel = 0; in ci_update_uvd_dpm()
4118 pi->smc_state_table.UvdBootLevel = in ci_update_uvd_dpm()
4123 tmp |= UvdBootLevel(pi->smc_state_table.UvdBootLevel); in ci_update_uvd_dpm()
H A Dcikd.h51 # define UvdBootLevel(x) ((x) << 24) macro
H A Dkv_dpm.c1442 offsetof(SMU7_Fusion_DpmTable, UvdBootLevel), in kv_update_uvd_dpm()