xref: /dflybsd-src/sys/dev/drm/amd/powerplay/inc/smumgr.h (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev  * Copyright 2015 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev  *
4*b843c749SSergey Zigachev  * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev  * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev  * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev  * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev  * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev  *
11*b843c749SSergey Zigachev  * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev  * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev  *
14*b843c749SSergey Zigachev  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*b843c749SSergey Zigachev  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev  * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev  *
22*b843c749SSergey Zigachev  */
23*b843c749SSergey Zigachev #ifndef _SMUMGR_H_
24*b843c749SSergey Zigachev #define _SMUMGR_H_
25*b843c749SSergey Zigachev #include <linux/types.h>
26*b843c749SSergey Zigachev #include "amd_powerplay.h"
27*b843c749SSergey Zigachev #include "hwmgr.h"
28*b843c749SSergey Zigachev 
29*b843c749SSergey Zigachev enum SMU_TABLE {
30*b843c749SSergey Zigachev 	SMU_UVD_TABLE = 0,
31*b843c749SSergey Zigachev 	SMU_VCE_TABLE,
32*b843c749SSergey Zigachev 	SMU_BIF_TABLE,
33*b843c749SSergey Zigachev };
34*b843c749SSergey Zigachev 
35*b843c749SSergey Zigachev enum SMU_TYPE {
36*b843c749SSergey Zigachev 	SMU_SoftRegisters = 0,
37*b843c749SSergey Zigachev 	SMU_Discrete_DpmTable,
38*b843c749SSergey Zigachev };
39*b843c749SSergey Zigachev 
40*b843c749SSergey Zigachev enum SMU_MEMBER {
41*b843c749SSergey Zigachev 	HandshakeDisables = 0,
42*b843c749SSergey Zigachev 	VoltageChangeTimeout,
43*b843c749SSergey Zigachev 	AverageGraphicsActivity,
44*b843c749SSergey Zigachev 	PreVBlankGap,
45*b843c749SSergey Zigachev 	VBlankTimeout,
46*b843c749SSergey Zigachev 	UcodeLoadStatus,
47*b843c749SSergey Zigachev 	UvdBootLevel,
48*b843c749SSergey Zigachev 	VceBootLevel,
49*b843c749SSergey Zigachev 	LowSclkInterruptThreshold,
50*b843c749SSergey Zigachev 	DRAM_LOG_ADDR_H,
51*b843c749SSergey Zigachev 	DRAM_LOG_ADDR_L,
52*b843c749SSergey Zigachev 	DRAM_LOG_PHY_ADDR_H,
53*b843c749SSergey Zigachev 	DRAM_LOG_PHY_ADDR_L,
54*b843c749SSergey Zigachev 	DRAM_LOG_BUFF_SIZE,
55*b843c749SSergey Zigachev };
56*b843c749SSergey Zigachev 
57*b843c749SSergey Zigachev 
58*b843c749SSergey Zigachev enum SMU_MAC_DEFINITION {
59*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_GRAPHICS = 0,
60*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_MEMORY,
61*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_LINK,
62*b843c749SSergey Zigachev 	SMU_MAX_ENTRIES_SMIO,
63*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_VDDC,
64*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_VDDGFX,
65*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_VDDCI,
66*b843c749SSergey Zigachev 	SMU_MAX_LEVELS_MVDD,
67*b843c749SSergey Zigachev 	SMU_UVD_MCLK_HANDSHAKE_DISABLE,
68*b843c749SSergey Zigachev };
69*b843c749SSergey Zigachev 
70*b843c749SSergey Zigachev enum SMU9_TABLE_ID {
71*b843c749SSergey Zigachev 	PPTABLE = 0,
72*b843c749SSergey Zigachev 	WMTABLE,
73*b843c749SSergey Zigachev 	AVFSTABLE,
74*b843c749SSergey Zigachev 	TOOLSTABLE,
75*b843c749SSergey Zigachev 	AVFSFUSETABLE
76*b843c749SSergey Zigachev };
77*b843c749SSergey Zigachev 
78*b843c749SSergey Zigachev enum SMU10_TABLE_ID {
79*b843c749SSergey Zigachev 	SMU10_WMTABLE = 0,
80*b843c749SSergey Zigachev 	SMU10_CLOCKTABLE,
81*b843c749SSergey Zigachev };
82*b843c749SSergey Zigachev 
83*b843c749SSergey Zigachev extern uint32_t smum_get_argument(struct pp_hwmgr *hwmgr);
84*b843c749SSergey Zigachev 
85*b843c749SSergey Zigachev extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
86*b843c749SSergey Zigachev 
87*b843c749SSergey Zigachev extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
88*b843c749SSergey Zigachev 
89*b843c749SSergey Zigachev extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
90*b843c749SSergey Zigachev 
91*b843c749SSergey Zigachev extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
92*b843c749SSergey Zigachev 					uint16_t msg, uint32_t parameter);
93*b843c749SSergey Zigachev 
94*b843c749SSergey Zigachev extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
95*b843c749SSergey Zigachev 
96*b843c749SSergey Zigachev extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
97*b843c749SSergey Zigachev extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
98*b843c749SSergey Zigachev extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
99*b843c749SSergey Zigachev extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
100*b843c749SSergey Zigachev extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
101*b843c749SSergey Zigachev extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
102*b843c749SSergey Zigachev extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
103*b843c749SSergey Zigachev extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
104*b843c749SSergey Zigachev extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
105*b843c749SSergey Zigachev 				uint32_t type, uint32_t member);
106*b843c749SSergey Zigachev extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
107*b843c749SSergey Zigachev 
108*b843c749SSergey Zigachev extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
109*b843c749SSergey Zigachev 
110*b843c749SSergey Zigachev extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
111*b843c749SSergey Zigachev 
112*b843c749SSergey Zigachev extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
113*b843c749SSergey Zigachev 
114*b843c749SSergey Zigachev extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
115*b843c749SSergey Zigachev 
116*b843c749SSergey Zigachev extern int smum_stop_smc(struct pp_hwmgr *hwmgr);
117*b843c749SSergey Zigachev 
118*b843c749SSergey Zigachev #endif
119